JPS5922135A - Data processing circuit - Google Patents

Data processing circuit

Info

Publication number
JPS5922135A
JPS5922135A JP57130245A JP13024582A JPS5922135A JP S5922135 A JPS5922135 A JP S5922135A JP 57130245 A JP57130245 A JP 57130245A JP 13024582 A JP13024582 A JP 13024582A JP S5922135 A JPS5922135 A JP S5922135A
Authority
JP
Japan
Prior art keywords
data
writing
gate
access
address
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57130245A
Other languages
Japanese (ja)
Other versions
JPS646486B2 (en
Inventor
Shigenori Tokumitsu
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP57130245A priority Critical patent/JPS646486B2/ja
Publication of JPS5922135A publication Critical patent/JPS5922135A/en
Publication of JPS646486B2 publication Critical patent/JPS646486B2/ja
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To improve the transfer efficiency of data, by providing a gate period for data access and allowing access to a memory for writing colored data and picture data in the gate period for access even if in a display period.
CONSTITUTION: For data transfer to and from a picture memory under CPU control, data is stored in a data register RG3 for writing during writing operation and its address is stored in address RGs 1 and 2 for writing. Data read out of the picture memory is stored in a data RG11 for reading and its address is stored in address RGs 7 and 8 for reading. A colored data gate and a picture data gate are opened during a picture display period, then the access gate is opened. Access gate signal generating means 4 and 5, and 9 and 10 for writing and reading are operated during the access gate period to write and read data and perform automatic increment control over address values during the writing and reading of data by circuits 102 and 104 to shorten data transfer time.
COPYRIGHT: (C)1984,JPO&Japio
JP57130245A 1982-07-28 1982-07-28 Expired JPS646486B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57130245A JPS646486B2 (en) 1982-07-28 1982-07-28

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57130245A JPS646486B2 (en) 1982-07-28 1982-07-28

Publications (2)

Publication Number Publication Date
JPS5922135A true JPS5922135A (en) 1984-02-04
JPS646486B2 JPS646486B2 (en) 1989-02-03

Family

ID=15029604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57130245A Expired JPS646486B2 (en) 1982-07-28 1982-07-28

Country Status (1)

Country Link
JP (1) JPS646486B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6330892A (en) * 1986-07-25 1988-02-09 Fujitsu Ltd Crt controller

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6330892A (en) * 1986-07-25 1988-02-09 Fujitsu Ltd Crt controller

Also Published As

Publication number Publication date
JPS646486B2 (en) 1989-02-03

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