JPS59211265A - Hetero junction bipolar transistor - Google Patents

Abstract

PURPOSE:To enable to perform a high speed switching operation while obtaining withstand voltage between an emitter and a base by setting the relationship between the impurity density and the thickness of the second emitter layer and the first base layer to satisfy the specific unequality. CONSTITUTION:The thickness of all base layer 13 is 1,000Angstrom or lower to perform a high speed switching operation. Then, the second emitter layer 142 made of n<-> type Ga1-xAlxAs of low impurity density and then the first emitter layer 141 of n<+> type Ga1-xAlxAs of high impurity density are epitaxially grown on the base layer 13. At this time the density NE and the thickness WE of the second emitter layer 142 and the density NB and the thickness WB of the first base layer 131 are set to satisfy the unequality (1). Finally, the periphery is removed except the center of the emitter by etching, the surfaces of the second base layer 132 is exposed, thereby completing the electrodes 14, 15, 16, 17 of the collector, base and emitter.

Description

DETAILED DESCRIPTION OF THE INVENTION [Technical Field of the Invention] The present invention relates to a bipolar transistor using a heterojunction as an emitter-paste junction.

[Technical background of the invention and its problems]

A conventional bipolar transistor has an npn or pnp structure in which the emitter, paste, and collector layers are made of the same semiconductor material. In this case, the emitter junction,
Both collector junctions are homozygous.

Recently, bipolar transistors in which one or both of the emitter junction and the collector junction are heterojunctions have attracted attention and are becoming the subject of research and development. One advantage of heterojunction bipolar transistors is that by constructing the emitter layer from a semiconductor material with a wider bandgap than the base layer, emitter injection efficiency can be increased. Due to the difference in the band gap between the emitter layer and the base layer υ, carrier injection from the emitter to the paste easily occurs when the emitter junction is forward biased.
This is because carrier injection from the pace to the emitter is suppressed.

Therefore, it is possible to obtain a higher current gain than a normal homojunction bipolar transistor.

The basic concept of such a heterojunction bipolar transistor has been known for a long time, and several examples have been published recently. The conventional basic structure when a heterojunction is used as the emitter junction is shown in FIG.

The figure shows an example using GaAs-GaAtAs system, where n-type Ga
An n-type GaAs collector layer 2 is formed on the As substrate 1.
, p-type GaAs space layer 3, n-type Ga 1-xAtX
It has a structure in which Aa emitter layers 4 are sequentially laminated.

5 is a collector electrode, 6 is a pace electrode, and 7 is an emitter electrode. The emitter layer 4 has a first emitter layer 42 with a high impurity concentration (n) on the emitter electrode 7 side, and a second emitter layer 42 with a low impurity concentration (n-) on the space layer 3 side. It is composed of many parts. Many of the conventionally announced devices have in common that the second emitter layer 42 has a sufficient thickness. The reason why the emitter layer has a two-layer structure of a high impurity concentration layer and a low impurity concentration layer and the thickness of the second emitter layer with a low impurity concentration is made sufficiently large is as follows.
This is said to be done to improve switching speed by reducing the emitter junction capacitance CJE (for example, s H
, Kroemer・”Heterostructure
Bipolar Transistors an
dIntegrated C1rcuits”*P
ro c, I EEE + Vol.

70, Al, PP. 13-25, January
ry 1982). In fact, in a one-sided stepped junction where the impurity concentration differs significantly across the junction surface, if the thickness of the low impurity concentration layer is sufficiently large, the junction capacitance CJE is equal to the impurity concentration N1 of the low impurity concentration layer CJ]ii "NE" As is well known, it is expressed as

To clarify the following discussion, let us clarify the concept of transistor switching speed. In general, there is a turn-on and a turn-off in the Nuwitching operation of a transistor, and the turn-on time t and the Kuhn-off time t
-off' average n propagation delay time tp is used as the standard for switching speed. Turn-on time t. n is 50% of the output current from O
The turn-off time toff is the time for the output current to fall from 100% to 50%. The above relationship is shown in FIG.

The present inventors have recently investigated in detail the relationship between the thickness of each layer, impurity concentration, and switching speed using a numerical analysis model for heterojunction bipolar transistors and transistors as shown in Figure 1. Theory of operation of bipolar transistors, 1981, Kindai Kagakusha, M. Kur.
ata.

NumerIcal Analysis for Se
m1conductorDevices"+ 1982
+ Lexington Book * D, C
.

Heath and Company, etc.). As a result, a conclusion was reached that contradicts the conventional theory. In other words, according to the numerical analysis model, the switching speed of a conventional transistor with a thick second emitter layer with a low impurity concentration (hereinafter referred to as type A) is lower than that of a transistor without such a second emitter layer and with a thick second emitter layer. It is significantly inferior to that of a transistor consisting of only one high impurity concentration layer (hereinafter referred to as Quiz B). The analysis results are shown in Table 1.

The conditions given for this numerical analysis are as follows for the circuit shown in Figure 3.
Collector power supply gc-=z(v), load resistance RL=200
[Ω], the input signal voltage V that turns off transistor Q.

ff-〇, 5 [V], input signal voltage V to turn on. n is the value shown in the table. In addition, in type A, the second emitter layer has an impurity concentration N = 3X1016 and a thickness ω = 1
It is μm. JP in Table 1.

Jcll'i are the current densities of the emitter and collector, respectively.

The reason for this result contradicting conventional common sense is as follows. Generally, in order to operate a bipolar transistor at high speed, it is necessary to set the emitter and collector current densities to a value of 10 3 to 10'A/cm 2 or more. This is clear from actual examples of bipolar logic integrated circuits and analysis results using numerical analysis models. When the Tie 76A has a thick second emitter layer with a low impurity concentration, the ability to supply carriers from the emitter to the paste is lower than that of Type B, so in order to obtain the desired emitter and collector current densities, it is necessary to A deep l1lfi direction bias voltage must be applied to the base-to-base junction. Under such operating conditions, excess carriers accumulate in the thick second emitter and collector layers, resulting in increased turn-off time and increased propagation delay time.

If we apply the above results by '9, we can find that the emitter junction capacitance CJP is
Although type A is smaller than type B, type B has better switching speed. The factors that determine the switching speed of a transistor are not only the emitter junction capacitances C and E, but also the total emitter capacitance 1cE=C. 10 CDF, which means that one must take into account. CDF is known as the emitter diffusion capacitance determined by the amount of excess carrier accumulation. Because of the thick first and second emitter layers, CDI is much larger than CJK, and the effect of reducing CJF on switching speed is hidden behind CDI and is not observed at all.

Based on the above, it has become clear that in terms of switching speed, it is more advantageous to adopt Type B for both Tie 7'A and Tie 7'A. However, type Bit: Since the emitter layer with high impurity concentration forms a direct junction with the paste layer, there is a problem that the breakdown voltage of the emitter junction is very low. The main cause of breakdown in a normal pn junction is the avalanche phenomenon, but even if the avalanche phenomenon can be avoided, breakdown occurs due to the tunnel effect. Particularly in the case of a heterojunction, in addition to the component determined by the direct transition of carriers between the nodes, the current due to the tunneling effect has many components controlled by the interface states that exist in large numbers at the heterojunction interface. For this reason, it is not uncommon for the actual tunnel current to be much larger than the simple theoretical value, and the emitter junction breakdown voltage to be extremely low.

[Purpose of the invention]

The present invention has been made based on the above considerations, and an object of the present invention is to provide a heterojunction bipolar transistor that provides optimal design criteria regarding switching speed and breakdown voltage.

[Summary of the invention]

In the transistor according to the present invention, an emitter layer and an open layer are made of a semiconductor material with a wide channel gap, and the emitter layer is composed of a first emitter layer with a high impurity concentration and a second emitter layer with a low impurity concentration. The basic principle is to do so.

In this respect, the transistor according to the present invention belongs to the above-mentioned type A. In addition to this basic structure, the present invention has a base layer consisting of a first base layer with a low impurity concentration on the emitter side and a second paste layer with a higher impurity concentration than the first base layer on the collector side. Configure. The design criteria regarding switching speed and emitter breakdown voltage are set to satisfy the relationship between the impurity concentration NB and thickness W8 of the second emitter layer and the impurity concentration NB and thickness WB of the first base layer. . In the above equation (1), q is the absolute value of electron charge (=1.6X10-19 coulombs), ε0
is the dielectric constant of vacuum (=8.86X 10-” Farad/
crn), εSE, and εSB are the dielectric constants of the second emitter layer and the first base layer, respectively, Vbl is the built-in potential of the heterojunction formed by the second emitter layer and the first base layer, and VB is the breakdown of the heterojunction. It is voltage.

The reason for giving such a design standard will be explained next. When a reverse voltage VB is applied to the Hetewa junction between the emitter and pace, the internal potential difference generated across the junction is Vbi + V
It is n. The electric field distribution generated at the heterojunction due to this potential difference is as shown in FIG. Fig. 4(,) shows that when the thickness W2 of the second emitter layer and the thickness WB of the first base layer are sufficiently large, Fig. 4(b) shows that the thickness WE of the second emitter layer and the thickness WB of the first base layer are large enough. When the thicknesses of the two empty layers WB, , dep and WB, de, which extend due to the internal potential difference, are equal to each other. In the same figure (C), WB and WB are respectively w, , , dep
This is the case when jWB, de, is very small. Figure 4 (a
), (b), according to the well-known theory, the following formula (2)
~(4) holds true.

+2), EA product 'ff: is deleted from equation (3),
~(8) holds 〇1 (Emin, g +Emax)WE+-5(Emin,
n +Emax)Wi+=Vbs +Vn ・-
(8) If EmlLX is calculated from these three equations,...(9) is obtained. However, in the above, the maximum value of the electric field in the depletion layer is F'maxs, and the minimum value of the electric field in the second emitter layer is ``rnt''.
The minimum value of the electric field within n *first pace is "min
* Rated as B.

Based on the above relationships, when the externally applied voltage V is taken as the breakdown voltage, the maximum speed υ of WB, dep and WB of the switching speed is less than the maximum speed υ, and EmlLX shown in equation (9) is the heterojunction. Equation (1) is given as a standard for setting WFj and WB so as not to exceed the maximum allowable electric field.

Note that the built-in potential of the heterojunction between the second emitter layer and the first base layer is expressed by Vbiti (above 2〇l).

However, k is Boltzmann constant, T is absolute temperature, nt(T
) is the intrinsic electron density of the base layer, XB is the electron affinity of the first base layer, and XE is the electron affinity of the second emitter layer.

(In the four-hole case, the first term on the right side is the same as in a normal homozygote, and the second term is unique to a heterozygote.

Specifically, n-type GIL07A is used as the second emitter layer.
The table below shows numerical examples of Vbl for typical impurity concentration silk combinations when p-type GaAg is selected as the A8° first base layer.

By setting the values to the values shown in Table 2, it is possible to realize a heterojunction bipolar transistor that is capable of high-speed switching operation while ensuring the emitter-paste breakdown voltage.

[Embodiments of the invention]

The present invention will be explained in detail below. GaAtAs-GaA
FIG. 5 shows the structure of an example using the s-system.

To explain this according to the manufacturing process, first, an n-type GaAs substrate 11 with a high impurity concentration is used as a target substrate, and then an n-type GaAs substrate 11 with a low impurity concentration doped with an impurity such as Sl.
A type GaAg collector layer 12 is epitaxially grown. This is the case when the collector-paste junction is a homojunction. If a heterojunction is also introduced in this junction, an n-type "1-XAtxAl1 layer can be grown epitaxially. In either case, epitaxial growth MB for
It is preferable to use the E method or the MOCVD method.

The same applies to the following steps. After this, a second space layer 132 made of p-type GaAg with a relatively high impurity concentration and doped with, for example, Be as an impurity on the collector layer 12, followed by a first space layer 131ff made of p-type GaAa with a low impurity concentration are epitaxially grown. let All base layers 13
The thickness is 100O to achieve high-speed switching operation.
It is preferable to set it to X or less. After this, on the paste layer 13, a low impurity concentration n-type Ga 1-
A second emitter layer 142 made of AZXA s, followed by a first emitter layer 14 made of layer type Ga 1-xAZxAts with a high impurity concentration! grown epitaxially. In both cases, the impurity is, for example, St. At this time, the concentration and thickness of the second emitter layer 142 and the first base layer 131.0
The relationship between concentration and thickness (1).

(2) Set to satisfy equation (2). Finally, etching is performed to remove the periphery while leaving the center of the emitter, exposing the surface of the second base layer 132, and forming collector, paste, and bottom emitter electrodes 15*16°17 to complete the process. .

This will be explained using a specific numerical example. A Ga(1,7At(14AB) layer with a band gap energy of 1.80 eV is used as the first emitter layer 141, and its donor impurity concentration is NE□=IO"m-" (!: Ll, second emitter f@I 42 is the same material and the donor concentration is NJ,!
=1017(7)-3, the thickness -1- is W, and =500. On the other hand, as the first base layer 131, acceptor concentration NB = 3X 10'' cm-3, thickness = 500'X
5G with a bandgap energy of 1.42 eV
aAs is used. The second paste layer 132 is made of the same material and has an acceptor concentration NB o''10''8LM'r-3.At this time, the built-in I at room temperature T=300°
Tensile Vbiu, formal smell, Xo=3.77e
vSXB=4.07 eV, nl(T)=1.10
As 1 x 10 cm, vbi-1,46V
becomes.

Therefore, if the emitter-paste junction breakdown voltage is determined to be VB = 3V, if the low concentration second emitter layer and the low concentration first paste layer are sufficiently thick, then E8B = 12.0.
12.9 is used. However, in the case of 1, w, = w
Since B=5ooi, when both sides of the tl1 formula are calculated using this, the left side=. Impurity concentration NB=3×101
For 6Crn-3, the maximum electric field value that can be tolerated without producing junction breakdown noise is approximately 5. Since I x 105V/cm (for example, S, M.

Sze l” Physics of Sem1con
ductor Devlceg'+1969+W
iley-Intorgcienee), above
Since ax is lower than this, the above design example can actually be adopted.

Next, as another design example, using the same materials as above, NGO
=102°crn-3, NE=1017L:nl-3,
N. =1018IJ-3, NB = 10'-8c
Let us consider the case where m-3, WF, = WB = 500 people, and V, = 3V. At this time, vbi = 1.49V.

W,de,=17001. wB,de,==ts2o
1. We obtain arx = 2.56 x 105V/(7). In this case, both sides of equation (1) are left side = 4.02
X 10' V/cm, right side = 4.97 X 10
' If V/α, then formula (1) is satisfied. Also El
Na! =4.85X10 V/steel, but 10
The maximum allowable electric field corresponding to an impurity concentration of 6 cm is approximately 6.
Since it is 4 x 105V and 7cm, this design example can also be adopted in reality.

The switching characteristics determined by the numerical analysis model when applied are shown in Table 3.It is the same as in Table 1 for circuit yarn production.

As is clear from comparing these results with Table 1 above, the switching speed is slightly inferior to type BVc, but much superior to type A. Moreover, in Type B, it is difficult to ensure a breakdown voltage between the emitter and the paste, whereas in this embodiment, it is easy to ensure a practically sufficient breakdown voltage.

Note that the present invention is not limited to the above embodiments. For example, as a combination of semiconductor materials, GaP% may be used in the emitter layer with a wide bandgap of 0, Sl may be used in the space layer with a narrow bandgap, or GaA8 may be used in the emitter layer with a wide bandgap, and Sl may be used in the emitter layer with a narrow bandgap. Ge f can also be used in the paste layer.

[Brief explanation of the drawing]

Figure 1 shows an example of a conventional heterojunction bipolar transistor, Figure 2 is a diagram for explaining the switching characteristics of the transistor, Figure 3 is a circuit diagram for determining the switching characteristics, and Figure 4 ( a) to (C) are diagrams showing impurity production distribution and electric field distribution for detailed explanation of the present invention. FIG. 5 is a diagram showing a heterojunction bipolar transistor according to an embodiment of the present invention. 11-... Layered GaAs substrate, 12- N-type GaAs collector layer, 131... P-type GaAs first space layer,
132-p type GaAs first space layer, 141-n+ type G
a 1-xAtxAs first emitter layer, 142-...n
-type Ga 1, -XAtXAs second emitter layer, 15~
17...electrode. Applicant's representative Patent attorney Takehiko Suzue No. 3 [1 Nikai Cao 3 No. 4 wJ Figure 5, Bゎ%Q, 2.・-28 Kazuo Wakasugi, Commissioner of the Japan Patent Office, 1, Indication of the case, Patent Application No. 1986-86063, 2, Title of the invention, heterojunction bipolar transistor 3, Patent related to the amended person case, t! Letter [1 person (307) Tokyo Shibaura Tonkei Co., Ltd. 4, Agent 6, Subject of amendment 7, Contents of amendment (1) The scope of the claims is revised as shown in the attached sheet. (2) Formula (1) on the second line from the bottom of page 11 of the specification is corrected as follows. (3) "Built-in potential, Vl is the breakdown voltage of the same heterojunction" on page 12, lines 6-7.
It's a built-in potential. ” he corrected. (4) "Reverse voltage ■" on page 12, lines 9 to 11
When , is applied,...vb4+-. ” [When the applied voltage is zero, the internal potential difference that occurs across the junction is VbI. ” he corrected. (5) Formula (3) on page 13, line 3 is corrected as follows. 1(o), Bma, (W,!l, c1ep+Wn, de
p) = Vb i...(3)(6) Formula (5) on page 13, line 6 of the same page is corrected as follows. (Formula (9) on page 14, lines 4 to 5 of the same page is corrected as follows. Line 11) Correct "When VB is the breakdown voltage" to "When VB is set to zero." (9) In the same No. 1911, lines 11 and 12, ``If the junction breakdown voltage is determined to be VB=3■,'' is corrected to ``When the applied voltage is zero.'' = 23321. F3(0)=,0.98XLO'V
/cIrLJ and correct ax. aη r 2.66X10' (V
/bo), right side = 4.94 x 10' (Vlcrn
7"2.66 x 10' (IAt), right side = 1.6
2 X 10'(1/α)". (12J rEmax on page 20, line 3 = 4.7
0XI O'V 7cm J to "8m3X=1°70
Correct it as x 1o' VlcrnJ. (13) Next to "Can be done." on page 20, line 10, [For reference, if you calculate the applied voltage that makes EmaN the maximum allowable electric field, the value is about 3.3■, which is practically Sufficient pressure resistance is ensured. ] Join. (1 (a) "NB=10181" on page 20, line 13 of the same
−3, w, =WB= 500
Corrected to 0014. (15) Description rWm on page 20, lines 15 to 19,
de, = 17001. ...but, "rWl,"
dep=9771. WB, dep=l 050X, E
! : Gain = 1.47 x 105V/cm. At this time, both sides of equation (1) are: left side = 4.20 x 10g (
Leh). Right side = 1.65 x 10' (1/cm),
Again, formula (1) is satisfied. Also Emaz = 2.49
"X i O'V/m," he corrected. (161, page 21, line 1, ``However,'' is ``, and the applied pressure such that Emax becomes this allowable value ゛upper pressure 1 kalpa 4.
"Because it's 5V," he corrected. 2. Claims (1) The emitter 1 is made of a semiconductor material with a wider band gap than the base layer, and includes a first emitter layer with a high impurity concentration on the electrode side and a second emitter layer with a low impurity concentration on the space side. In a heterojunction bipolar transistor, the base layer is composed of a first base layer with a low impurity concentration on the emitter side and a second base layer with a higher impurity concentration than the first base layer on the collector side, and The impurity concentration NII and thickness W6 of the second emitter layer and the impurity special 791 N of the first base layer! l and thickness WB
A heterojunction bipolar transistor characterized in that the relationship between the two is set to satisfy the following formula. However, in the above formula. q: Absolute value of electronic charge (= 1.6 x 10-" coulombs) ε.: Permittivity of vacuum (= 8.86 x 10-14
Huaratushi Ue ε. : Relative dielectric constant εIIB of the second emitter layer : Relative dielectric constant Vbiz of the first base layer Built-in potential of the heterojunction formed by the second emitter layer and the first base layer (2) The emitter layer is G"-xA'xA8. Base layer is Q
aAs, collector layer is GaAs or GaAl! A
The heterojunction bipolar transistor according to claim 1, which is s.

Claims (2)

[Claims] (1) A heterojunction bipolar transistor in which the emitter layer is made of a semiconductor material with band gear horns wider than the base layer, and is composed of a first emitter layer with a high impurity concentration on the electrode side and a second emitter layer with a low impurity concentration on the space side. wherein the base layer is composed of a base layer with a low impurity concentration on the emitter side and a second paste layer with a higher impurity concentration than the first paste layer on the collector side, and the impurity of the second emitter layer is A heterojunction bipolar transistor characterized in that the relationship between the concentration NE and the thickness WF, and the relationship between the impurity concentration N and the thickness of the first paste layer is set to satisfy the following formula. cSE 'SB Q However, in the above formula, q: Absolute value of electron charge (= 1.6 x 10-19 coulombs) ε. : Dielectric constant of vacuum (= s, s 6 x 10
-14 farad/cIn) cSE 'Relative permittivity of the second emitter layer εSB 'Relative permittivity of the first paste layer vbt 'Built-in potential of the heterojunction formed by the second emitter layer and the first paste layer Breakdown voltage of telojunction (2) The emitter layer is Ga1-xAtXA3. Base layer is GaAs r Collector layer is GaAs or GaAtAs
A heterojunction bipolar transistor according to claim 1.