JPS59205621A - Power supply circuit - Google Patents

Power supply circuit

Info

Publication number
JPS59205621A
JPS59205621A JP8040483A JP8040483A JPS59205621A JP S59205621 A JPS59205621 A JP S59205621A JP 8040483 A JP8040483 A JP 8040483A JP 8040483 A JP8040483 A JP 8040483A JP S59205621 A JPS59205621 A JP S59205621A
Authority
JP
Japan
Prior art keywords
circuit
voltage
power supply
switch
capacitor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8040483A
Other languages
Japanese (ja)
Inventor
Tatsuo Ogawa
辰雄 小川
Masanori Kawai
川合 正典
Takashi Yamamoto
隆司 山本
Nobuyuki Morihara
森原 延幸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Electric Works Co Ltd
Original Assignee
Matsushita Electric Works Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Works Ltd filed Critical Matsushita Electric Works Ltd
Priority to JP8040483A priority Critical patent/JPS59205621A/en
Publication of JPS59205621A publication Critical patent/JPS59205621A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G05CONTROLLING; REGULATING
    • G05FSYSTEMS FOR REGULATING ELECTRIC OR MAGNETIC VARIABLES
    • G05F1/00Automatic systems in which deviations of an electric quantity from one or more predetermined values are detected at the output of the system and fed back to a device within the system to restore the detected quantity to its predetermined value or values, i.e. retroactive systems
    • G05F1/10Regulating voltage or current
    • G05F1/12Regulating voltage or current wherein the variable actually regulated by the final control device is ac
    • G05F1/40Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices
    • G05F1/44Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only
    • G05F1/45Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load
    • G05F1/455Regulating voltage or current wherein the variable actually regulated by the final control device is ac using discharge tubes or semiconductor devices as final control devices semiconductor devices only being controlled rectifiers in series with the load with phase control

Abstract

PURPOSE:To miniaturize a power supply circuit and to attain the use of this circuit in both Japan and foreign countries where a different voltage is applied for power supply by turning off a switch circuit when the rectified voltage is higher than a prescribed level to avoid the input of the voltage higher than the prescribed level to a constant voltage circuit. CONSTITUTION:When the rectified voltage VDS exceeds the Zener voltage VZD3 of a Zener diode ZD3 of a switch control circuit 6, a capacitor C6 is charged via a resistance R13. When the charging voltage of the C6 reaches the gate trigger voltage VT of a thyristor SCR, the SCR is turned on. At the same time, a switch circuit 5 consisting of transistors TR Q4 and Q5 is turned off to prevent the input of the high level part of VDS to a constant voltage circuit 3. As a result, it is avoided that the voltage higher than a fixed level is fed to the circuit 3. Thus the breakdown strength is reduce for a capacitor C1 and also the area between the collector and the emitter of a TRQ1. This attains the miniaturization of a power supply circuit.

Description

【発明の詳細な説明】 〔′技術分野〕 本発明は負荷回路に定電圧を供給する電源回路に関する
ものである。
DETAILED DESCRIPTION OF THE INVENTION [Technical Field] The present invention relates to a power supply circuit that supplies a constant voltage to a load circuit.

〔背景技術〕[Background technology]

従来、この種の電源回路ぼけ第1図に示すように、交流
電源(1)をタイオード(D□)よシなる整流回路(2
)にて整流した整流電圧VDOを定電圧回路(3)を介
して負荷回路(4)に供給するようにしており、この定
電圧回路(3)は降圧用抵抗(R1)、平滑用のコンデ
ンサ(C1)、制御用のトランジスタ(Ql)、電圧設
定用のツェナタイオード(ZDi)、バイアス抵抗(R
Q)および安に他用のコンデン+j(C2)にて形成さ
れ、ツェナタイオード(ZDI)のツェナ電圧に基いて
設定されるに電圧vcが負荷回路(4)に供給されるよ
うになって、いた。ところで、このような従来例におい
て、交流電源(11の電源電圧vAcの許容変動範囲を
大さく(例えは80V〜140V)設定すると、gt犬
は圧で使用時に抵抗(Rl )による消費電力が大きく
なる上発熱による信頼性の低下が起きるという問題があ
シ、筐た、トランジスタ(Ql)のコレクタエミッタ間
耐圧、コレクタ損失およびコンデンサ(C1)の耐圧を
大きく設定しなければならず、高価で形状の大きい部品
を使用することになシ、低コストで小型の電源回路(ト
)′が得られないという問題があった。
Conventionally, as shown in Figure 1, an AC power supply (1) is connected to a rectifier circuit (2) using a diode (D□).
), the rectified voltage VDO is supplied to the load circuit (4) via a constant voltage circuit (3), and this constant voltage circuit (3) includes a step-down resistor (R1) and a smoothing capacitor. (C1), control transistor (Ql), zener diode (ZDi) for voltage setting, bias resistor (R
Q) and another capacitor +j (C2) are formed, and a voltage vc is supplied to the load circuit (4), which is set based on the zener voltage of the zener diode (ZDI). ,there was. By the way, in such a conventional example, if the permissible fluctuation range of the power supply voltage vAc of AC power supply (11) is set to be large (for example, 80V to 140V), the power consumption due to the resistance (Rl) when using the GT dog will be large. In addition, there is the problem of reduced reliability due to heat generation, and the casing, collector-emitter breakdown voltage of the transistor (Ql), collector loss, and capacitor (C1) breakdown voltage must be set large, which is expensive and requires a large size. There is a problem in that it is not possible to obtain a small power supply circuit at low cost due to the use of large components.

〔発明の目的〕[Purpose of the invention]

本発明は上記の点に鑑みて為されたものであシ、低コス
トで小型の電源回路を提供することを目的とするもので
ある。
The present invention has been made in view of the above points, and it is an object of the present invention to provide a small-sized power supply circuit at low cost.

〔]元明の開示〕[]Genmei's disclosure]

第2図乃至第6図は木兄)−!IJによる電源回路(A
)を用い/i7.多ケF”)’r操作型スイッチ装置の
一実施例を示すもので、(10) ri、親画、(lり
は子器であり、親画(10)からの専用線(12)に複
数個の子器tli)を接続1〜、親画(1o)あるいは
子器(1りの操作スイッチ(月a) (且b)の操作に
より負荷(13)を多う所からオシオフロ用御でさるよ
う(て1〜でいる。親画(10)ζJ、第6図に示すよ
うに、]ン7!シ+′j(C3)が1j二列接続→れた
負倚iti!I側】用の1巻線ラツチンジリレー(Ry
x) に・よひ双方向型3端子サイリスタ(l゛)より
なるハイブリッド)要点回路1.20)と、操作スイッ
チ(if)a)を1.ンすることにより励磁される2巻
線ラツチンノリlノ(Ry2)、動作表示用発光タイオ
ード(LDI) (LD2>、逆を扉阻止用タイオード
(D2)(D3)、抵抗(Ra) 〜(R6) オよび
]、ンデシサ(C4) (C5)よりなる操作回路シl
)と、1−ラυジスタ(C2) (C3)および抵抗(
R7)〜(R10)よりなる電源短絡防止回路シカと、
本発明による電源回路(A)とで形成されており、電源
回路囚は従来例と同体の定電圧回路(3)にトランジス
タ(C4)(C5)、タイオー1(D4)および抵抗(
R11) (R*)よりなるスイッチ回路(5)を介し
て整流電圧■Dcを人力し、逆阻止型、′3@子サイリ
スタ(SCR)、ツェナタイオード(Zn3)、」ンヂ
ン1ノ(C6)および抵抗(R13) (R14)より
なるスイッチ制御回路(6)にてスイッチ回路(5)を
制御却し、整流電圧VOCが予め設足された電圧よりも
犬きくなったときスイッチ回路(5)をオフさせるよう
になっている。図中(rm)(rlb)はラッチ、Jj
リレー(Ryl)の接点、(rm)(rPb)はラッチ
X)jリレー(Ry2)の接点、(Zn2>は定電圧回
路(3)の′市川切換用ツェナタイオード、σ?)は温
度しユーズ、(ZNR)Ii雑雑用用非線形抵抗(Ra
) (Rgb)は抵抗である。第41図および第5図は
親画(101の構造を示す図であり、例はボディ@l)
およびカバー国よりなるケース、(33)は取付枠、鍼
は操作回路ブロック、い四はハイづリッド接点回路′ブ
ロック、(綱は端子−3+コツク、(、Ma)は端子カ
バー、(3′7)はハシドル、(38)は固定ばね、(
39)はストッパ、(+0)はコイルはねである。この
場合、ハンドル0′7)は両側の突起(37a)を軸と
し゛C揺動自在に保持され、両脚片に”;Tb)でそれ
ぞれ操作スイッチ(j珈) & rt+圧するようにな
っている一万、子器(11)は第0図に示すように、専
用線(12)を介し7て親画(1(l]の操作スイッチ
(」Ωa)に並列接続される操作スイッチ(IJ−a)
と、専用線(12)の電圧をチェックして負荷(13)
の動作状態を表示する動作表示回路(23)とでjkl
戊され、動作表示回路(四はタイオードブリッジ(DB
)と、ツェナタイオード(Zn5)と、l・う、:/ジ
ス’i (C6)と、発光ダイオード(LD3)(Lf
)、)と、スイッチ、フジダイオ−1ミ(1)6)と〕
′:)デυ勺(C7)と、抵抗(R15) −(R17
)とで形成熟れている。
Figures 2 to 6 are Ki-ni)-! Power supply circuit using IJ (A
) using /i7. This shows an example of a multiple-operation type switch device, in which (10) ri is the main picture, (l is the slave unit, and the dedicated line (12) from the main picture (10) is connected to By connecting multiple slave units tli), you can control the oscilloscope from a place with a large load (13) by operating the main picture (1o) or the slave unit (one operation switch (a) (and b)). As shown in Figure 6, the parent picture (10) ζJ, as shown in Figure 6, ]n7!C+'j (C3) is 1j double-row connection → negative ti!I side] Single winding latching relay (Ry
x) Main circuit (hybrid) consisting of two-way three-terminal thyristor (l) (1.20) and operation switch (if) a). 2-winding latch control (Ry2), which is excited by turning on, a light emitting diode (LDI) for operation indication (LD2>), a diode for blocking the door (D2) (D3), and resistors (Ra) to (R6). and ], an operating circuit consisting of a digital sensor (C4) and (C5)
), 1-large υ resistor (C2) (C3) and resistor (
A power short-circuit prevention circuit consisting of R7) to (R10);
The power supply circuit (A) according to the present invention is composed of a constant voltage circuit (3) that is the same as the conventional example, transistors (C4) (C5), diodes 1 (D4), and a resistor (
R11) (R*) The rectified voltage ■Dc is manually input through the switch circuit (5) consisting of a reverse blocking type, '3@child thyristor (SCR), Zener diode (Zn3), ) and resistors (R13) (R14) controls the switch circuit (5), and when the rectified voltage VOC becomes higher than the preset voltage, the switch circuit (5) ) is turned off. In the figure, (rm) (rlb) are latches, Jj
The contacts of the relay (Ryl), (rm) (rPb) are the contacts of the latch (ZNR) Ii miscellaneous nonlinear resistor (Ra
) (Rgb) is a resistance. Figures 41 and 5 are diagrams showing the structure of the parent image (101; the example is body @l)
and the case consisting of the cover country, (33) is the mounting frame, the needle is the operation circuit block, I4 is the hybrid contact circuit' block, (the rope is terminal -3 + Kotoku, (, Ma) is the terminal cover, (3' 7) is a hasidor, (38) is a fixed spring, (
39) is a stopper, and (+0) is a coil spring. In this case, the handle 0'7) is held swingably around the protrusions (37a) on both sides, and there are operating switches (jc & rt+) on both legs that can be pressed with Tb). As shown in FIG. )
Then, check the voltage of the dedicated line (12) and check the voltage of the load (13).
jkl with an operation display circuit (23) that displays the operation status of
The operation display circuit (4 is a diode bridge (DB)
), zener diode (Zn5), l・u, :/jis'i (C6), and light emitting diode (LD3) (Lf
),), switch, Fujidaio-1mi(1)6) and]
′:) resistance (C7) and resistance (R15) - (R17
) and has matured in form.

以下、央加例の動作について祝用する。い1、親器(1
0)の操作回路V、1)のラッチシフリレー(Ry2)
の接点(rか)(r21))が図に示すようにそれぞれ
NC側に切換えられている場合、ハイブリッド接点回路
シ0)のラフチンノリ1ノー(Ryx)の接点(rx−
) (rlb)およびサイリスタ(I゛)はオフしてお
り、負荷0(6)は動作せず、オフ灸示用の発光タイオ
ード(LD2)が点灯するとともにオシ表示用の発光タ
イオー ド(LDl)が消灯して負荷VI(6)がオフ
状態であることを親画(1o)側で表示している。この
とき、定電圧回路(3)にはツェナ電圧が低いツェナタ
イオード(Zn2)が接続されており、定電圧回路(3
)から低い定電圧V Cl (aV)が出力され、専用
線(I″2Jを介して子器(1りに印〃目σ扛る。ここ
に、子器(Iりの動作表示回路(23)ではツェナタイ
オード(Zn2)のツェナ電圧を定電圧VCIよシも高
< (33V)設層しており、!−ランジスタ(C6)
がオフとなるので、オン表示用の発光タイオード(LD
3)が消灯するとともにオフ表示用の発光タイオード(
LD4)が点灯して負荷画がオフであることを子器(1
り側で表示する。なお、この状態において、コンヂン+
I′(Cps) (C4)にI’lI:i:ラッチシフ
リレ(Ryよ)(Ry2)を十分駆動できる電荷が蓄積
さ肚ている。次に、親画(1o)あるいは子器(11)
の操作スイッチ(10a、) (lla)がオシされる
と、」シデシサ(C4)の電荷がラッチシフリレ−(R
y2)のセットコイルLsを介して流れ接点(r+l!
a)(ra)がNO側に切換わる。すると、コンデシサ
(C3)の電荷がラッチ:)ジリレー(Ryx)のコイ
ル(r、 1>を介して流れ、接点(rla)がオンす
ることによってサイリスタσ)が才シした後、接点(r
xb)がオシして負荷り(6)が動作するようになって
おシ、このとき、オシ表示用の発光タイオーt:(LD
I)が点灯する。同時に、定電圧回路(3)のツェナタ
イオード(ZD2)が切離されるので、定電圧回路(3
)からはツェナタイオード(ZDI)のツェナ電圧に基
いた賜い定電圧Vc2 (48V)・が出力され、専用
線(12Jを介して子器(lりに印加きれ、トランジス
タ(Q6)が才υしてオシ表示用の発光タイオード(L
D3)が点灯する。仄に、操作スイッチ(lOa) (
na)がオンされると、コンデンサ(C5)に蓄積され
ている電荷がラッチシタリレー(Ry2)のリセットコ
イル(LR)を介して流れ、接点(r2a) (rあ)
が反転するとともに、ラツチンノリし−(Ryl)の励
磁コイル(Ll)に図示極性にコンデンサ(C3)を1
充電するコンデンサ(C3)の充電電流が流れ接点(r
m) (r1℃)がオフして負荷(13)がオフされる
。同様にしていずれかの操作スイッチ(IDa) (n
b)が操作される毎に負荷(13)がオン、オフちれる
ことになる。
Below, I will congratulate you on the actions of the central figure. i1, parent equipment (1
0) operating circuit V, 1) latch shift relay (Ry2)
When the contacts (r) and (r21)) are switched to the NC side as shown in the figure, the rough contact 1 and no (Ryx) contacts (rx-
) (rlb) and the thyristor (I゛) are off, the load 0 (6) does not operate, the light emitting diode (LD2) for indicating off moxibustion lights up, and the light emitting diode (LDl) for indicating moxibustion lights up. is turned off, indicating that the load VI (6) is in an off state on the main picture (1o) side. At this time, a Zener diode (Zn2) with a low Zener voltage is connected to the constant voltage circuit (3).
), a low constant voltage V Cl (aV) is output from the slave unit (1) through a dedicated line (I"2J). Here, the operation display circuit (23 ), the zener voltage of the zener diode (Zn2) is set higher than the constant voltage VCI (33V), and the !- transistor (C6)
is turned off, so the light emitting diode (LD
3) goes out and the light emitting diode (
LD4) lights up to indicate that the load image is off.
display on the remote side. In addition, in this state, condensation +
I' (Cps) (C4) has enough charge accumulated to drive I'lI:i: latch shift relay (Ry) (Ry2). Next, the main picture (1o) or the slave picture (11)
When the operation switch (10a,
y2) through the set coil Ls of the flow contact (r+l!
a) (ra) switches to the NO side. Then, the charge of the capacitor (C3) flows through the coil (r, 1> of the latch relay (Ryx), and the contact (rla) is turned on, which turns on the thyristor σ).
xb) turns on and the load (6) starts operating. At this time, the light-emitting diode t: (LD
I) lights up. At the same time, the Zener diode (ZD2) of the constant voltage circuit (3) is disconnected, so the constant voltage circuit (3)
) outputs a constant voltage Vc2 (48V) based on the Zener voltage of the Zener diode (ZDI), and the voltage is applied to the slave unit (1) via the dedicated line (12J), and the transistor (Q6) is activated. and a light emitting diode (L) for display.
D3) lights up. At the same time, the operation switch (lOa) (
When na) is turned on, the charge accumulated in the capacitor (C5) flows through the reset coil (LR) of the latch relay (Ry2), and the contact (r2a) (ra)
is reversed, and a capacitor (C3) is connected to the excitation coil (Ll) of the latch (Ryl) with the polarity shown.
The charging current of the capacitor (C3) to be charged flows through the contact (r
m) (r1°C) is turned off and the load (13) is turned off. In the same way, either operation switch (IDa) (n
Each time b) is operated, the load (13) is turned on and off.

ところで、本発明による電源回路の動作はvJT図に示
すように、整流電圧VDCがスイッチ制御回路(6)の
ツェナタイオード(ZD3)のツェナ電圧VZD3 (
4’7V)を超えたときに抵抗(R13)を介してコン
デンサC6)が充電され、]′Jデコンデンサ)の充電
電圧がサイリスタ(SCR)のゲートトリカミ圧vTに
達すると、サイリスタ(SCR)がオシしてトランジス
タ(Q4)(Q5)よりなるスイッチ回路(5)がオフ
し、定電圧回路(3)K整流電圧VDOの高圧部分が入
力されないようにしている。したがって、定電圧回路(
3)には−足取上の電圧が入力されず、定電圧回路(3
)のコンデンサ(C1)の耐圧およびトランジスタ(Q
l)の]レクタエ三ツタ間耐圧、コレクタ損失を小さく
することができ、低コスト化、小型化が図れることにな
る。なお、抵抗(R14)およびコンデンサ(C6)の
時屋故janはコンデンサ(C6)の放電によって半サ
イクルのサイリスタ(SCR)がオシした後の期間にす
八 イリスタ(SCR)のゲート電流を流し続けるよりな1
直に設定される。このことに、より、サイリスタ(1゛
5CR)がオシした後、抵抗(R12)を介して流すア
ノード電流は保持電流以下にしても良いこと(なり、抵
抗(R12)はトランジスタ(Q5)のベース電流を流
すだけとなるので、この抵抗(R12)を高抵抗にする
ことができ、電力ロスを少なくすることができる。また
、第8図に示すようにコンデンサ(C6)を省略しても
良いことはdうまでもない。
By the way, in the operation of the power supply circuit according to the present invention, as shown in the vJT diagram, the rectified voltage VDC is equal to the zener voltage VZD3 (
4'7V), the capacitor C6) is charged via the resistor (R13), and when the charging voltage of the ]'J decapacitor) reaches the gate voltage vT of the thyristor (SCR), the thyristor (SCR) The switch circuit (5) consisting of transistors (Q4) and (Q5) is turned off to prevent the high voltage portion of the rectified voltage VDO from being input to the constant voltage circuit (3). Therefore, the constant voltage circuit (
3), the voltage on the -step is not input, and the constant voltage circuit (3)
) of the capacitor (C1) and the transistor (Q
l)] The breakdown voltage between the rectifier and the collector and the collector loss can be reduced, and the cost and size can be reduced. In addition, the resistor (R14) and capacitor (C6) keep the gate current of the thyristor (SCR) flowing during the period after the half-cycle thyristor (SCR) is turned on by discharging the capacitor (C6). Yorina 1
set directly. This means that after the thyristor (1゛5CR) turns on, the anode current flowing through the resistor (R12) may be lower than the holding current (this means that the resistor (R12) is the base of the transistor (Q5). Since only current flows, this resistor (R12) can have a high resistance and power loss can be reduced.Also, the capacitor (C6) can be omitted as shown in Figure 8. Of course it goes without saying.

第9図は他の実施例を示すもので、第8図実施例におけ
るサイリスタ(SCR)をトランジスタ(Ql)に代え
るとともに、雑音防止用インタフタンス(LN)および
コシヂンt (CN)を設けたものである。
FIG. 9 shows another embodiment, in which the thyristor (SCR) in the embodiment of FIG. 8 is replaced with a transistor (Ql), and a noise prevention interface (LN) and cosiden t (CN) are provided. It is.

いま、定電圧回路(3)には9410図(a)に示すよ
うに整流電圧VDcのツェナ電圧VD3よりも高い部分
がカットされた電圧が入力され、コシデクt (C1)
には@10図(b)に示すような充′屯電流ICが流れ
、充電電流■cの急峻な立上シ、立下り時に位相制御雑
音が発生することになるが、雑音防止用のインタフタン
ス(LN)およびコンデンサ(CM)によって、この位
相制御雑音が除去できるよう例なっている〔発明の効果
〕 本発明は上述のように、交流電源を整流した整流電圧を
定電圧回路を介して負荷回路に供給するようにして成る
電源回路において、整流電圧をスイッチ回路を介して定
電圧回路に入力し、整流電圧が予め設定された電圧よシ
も大きくなったとき該スイッチ回路をオフさせるスイッ
チ制御回路を設けたものであシ、定電圧回路に予め設定
された電圧以上の電圧が入力されないようになっている
ので、交流電源電圧の許容変動範囲を大きくした場合に
あっても定電圧回路に使用するトランジスタの耐圧、コ
レクタ損失、平滑用の]シデシサの耐圧などを最大電圧
に応じて大きくする必要がなく、低コスト化、小型化が
図れ、また、電源電圧が異る外国と国内とで共用できる
電源回路を提供できるという利点がある。
Now, as shown in Figure 9410 (a), the constant voltage circuit (3) is inputted with a voltage in which the part of the rectified voltage VDc that is higher than the Zener voltage VD3 is cut, and the voltage is input to the constant voltage circuit (3).
A charging current IC as shown in Figure 10 (b) flows through the IC, and phase control noise is generated when the charging current c steeply rises and falls. [Effects of the Invention] As described above, the present invention rectifies the rectified voltage of the AC power supply through the constant voltage circuit. In a power supply circuit configured to supply a load circuit, a switch that inputs a rectified voltage to a constant voltage circuit via a switch circuit and turns off the switch circuit when the rectified voltage becomes higher than a preset voltage. It is equipped with a control circuit, and the voltage exceeding the preset voltage is not input to the constant voltage circuit, so even if the permissible fluctuation range of the AC power supply voltage is increased, the constant voltage circuit will not be affected. There is no need to increase the breakdown voltage of transistors used for This has the advantage of providing a power supply circuit that can be shared by multiple users.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来例の回路図、第2図は多ケ所操作型スイッ
チ装置の概略構成図、第5図は本発明による電源回路を
具備したスイッチ装置の要部回路図、第4図は同上の要
部斜視図、第5図は同上の要部分解斜視図、第6図は同
上の要部回路図、第7図は同上の動作説明図、第8図は
他の実施例の回路図、f;0図I″iさらに他の実施例
の回路図、第10図は同上の動作説明図である。 +1+は交流電源、(3)は定市圧回路、(4)は負荷
回路、(5)はスイッチ回路、(6)はスイッチ匍制御
回路である。 代理人 弁理士 石 1)長 七
Fig. 1 is a circuit diagram of a conventional example, Fig. 2 is a schematic configuration diagram of a multi-point operation type switch device, Fig. 5 is a main part circuit diagram of a switch device equipped with a power supply circuit according to the present invention, and Fig. 4 is the same as above. Fig. 5 is an exploded perspective view of the main parts of the above, Fig. 6 is a circuit diagram of the main parts of the same, Fig. 7 is an explanatory diagram of the operation of the same, and Fig. 8 is a circuit diagram of another embodiment. , f; 0 Figure I''i A circuit diagram of another embodiment, and Figure 10 is an explanatory diagram of the same operation as above. +1+ is an AC power supply, (3) is a constant voltage circuit, (4) is a load circuit, (5) is a switch circuit, and (6) is a switch control circuit. Agent Patent Attorney Ishi 1) Choshichi

Claims (1)

【特許請求の範囲】[Claims] +1)i交流電源を整流した整流電圧を定電圧回路を介
して負荷回路に供給するようにして成る電源回路におい
て、整流電圧をスイッチ回路を介して定電圧回路に入力
し、整流電圧が予め設定された電圧よシも大きくなった
とき該スイッチ回路をオフさせるスイッチ制御回路を設
けたことを特徴とするg源回路。
+1) i In a power supply circuit configured to supply a rectified voltage obtained by rectifying an AC power source to a load circuit via a constant voltage circuit, the rectified voltage is input to the constant voltage circuit via a switch circuit, and the rectified voltage is set in advance. 1. A g source circuit comprising a switch control circuit that turns off the switch circuit when the applied voltage increases.
JP8040483A 1983-05-09 1983-05-09 Power supply circuit Pending JPS59205621A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8040483A JPS59205621A (en) 1983-05-09 1983-05-09 Power supply circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8040483A JPS59205621A (en) 1983-05-09 1983-05-09 Power supply circuit

Publications (1)

Publication Number Publication Date
JPS59205621A true JPS59205621A (en) 1984-11-21

Family

ID=13717347

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8040483A Pending JPS59205621A (en) 1983-05-09 1983-05-09 Power supply circuit

Country Status (1)

Country Link
JP (1) JPS59205621A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63139616U (en) * 1987-03-03 1988-09-14

Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS512929A (en) * 1974-06-28 1976-01-12 Matsushita Electric Works Ltd TEIDENATSUCHOKURYUDENGENKAIRO
JPS5637109B2 (en) * 1976-08-09 1981-08-28
JPS5649921B2 (en) * 1972-01-05 1981-11-26

Patent Citations (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5649921B2 (en) * 1972-01-05 1981-11-26
JPS512929A (en) * 1974-06-28 1976-01-12 Matsushita Electric Works Ltd TEIDENATSUCHOKURYUDENGENKAIRO
JPS5637109B2 (en) * 1976-08-09 1981-08-28

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63139616U (en) * 1987-03-03 1988-09-14

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