JPS59153245A - Debugging device - Google Patents

Abstract

PURPOSE:To simplify the setting operation of a debugging start address by inputting an address in a program counter through a memory storing an optional address to be set in the program counter of a CPU on the master machine side. CONSTITUTION:When an address to be set up in the program counter PC is registered by operating a keyboard 6 and a setting PC key is depressed, the address is set up in the PC, and simultaneously stored in a buffer register RBF in a memory 5. If the setting PC key is depressed without registering the address, the address already stored in the RBF is set up in the PC. When the same address is repeatedly debugged without changing the debugging start address of the PC, only the setting PC key is depressed without specdifying an address every time, so that key operation can be simplified.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of the Invention) The present invention relates to a debugging device for a computer system, and more particularly to a processing technique for repeatedly starting a program from a specific address.

(Back of the invention) As is well known, when debugging a program, it is necessary to run the program from the beginning [not the actual mcp].
It is often done to set a certain address in the program of u and start program execution from that address. Furthermore, when debugging a certain part of the program, it is common to repeatedly start a program from a specific address.

In conventional debugging devices, it is of course possible to enter an arbitrary address into the program counter of the actual CPU by operating the keyboard, and to start program execution from that address. However, if you repeatedly start program execution from a specific address, you must operate the keyboard each time to set the specific address in the program counter of the real 11 CPU. There wasn't. This operation is extremely troublesome in practice, and has become an obstacle to efficient program debugging.

(Objective of the Invention) The object of the invention is to eliminate the need to set the specific address in the program counter of the actual CPU each time when program execution is repeatedly started from a specific address. The purpose of the present invention is to provide a debugging device with good operability.

(Structure and Effects of the Invention) In order to achieve the above object, the present invention provides real mc
an input means for inputting an arbitrary address to be set in the program counter of the p u; a storage means for storing the address input by the input means; means for setting the address in the program counter of the real 1 CPU when a command is input; and a means for setting the address in the program counter of the real CPU when the command is input without an address input by the input means; The present invention is characterized by comprising means for setting an address in the program counter of one real CPU.

According to this debugging device, once a start address for program execution is input, it is possible to repeatedly start from that address with a simple operation.

(Explanation of Examples) FIG. 1 shows an embodiment of the invention.

A real device A to be debugged and a debugging device B according to the present invention are shown in a combined state. However, the actual CPU
1 lead terminal or system bus (address bus A)
B1. Data bus [)B1. control bus 0B1)
The basic configuration of a debugging device for debugging a program by extracting address signals, data bus signals, and control signals from the computer is well known, and detailed illustration thereof is omitted. In the figure, only the features of the debugging device of the present invention are extracted and shown.

The real MU CP tJ 1 sequentially addresses the real device memory 2 according to the contents of the program counter PC and executes the program. Therefore, with the real CPU 1 stopped, set the desired address in the program counter PC using the debugging device @B, and then restart the real CPU 1.
By starting , you can start program execution from any address.

The debug device 13 includes an interface circuit 3 that connects the system bus of the actual CPU 1 and this device, a CPU 4 that is the center of overall control and data processing of this device, and a
A memory 5 in which programs executed by the U4 and various data are stored; and a keyboard 6 operated by an operator to provide various inputs to the CPU 4.
, a key manual control circuit 7 that connects the keyboard 6 and the CPU 4 , a display 8 on which various data associated with debugging are displayed, and a display control circuit 9 that connects the display 8 and the CPIJ 4 . Keyboard 6 in memory 5
Input register RI where human input data is stored
N and a baffle register R8F in which the address to be set in the program counter PC of the actual CPU 1 is stored.
is set.

In the debugging device B of the present invention, the operator operates the keyboard 6 to first enter the address to be set in the program counter PC, and then
When the T-PC key (program counter set key) is pressed, the previously input address is set in the program counter PC of the CPU 1, and at the same time, the address is also stored in the baffle register RBF of the memory 5.

If the 5ET-PC key on the keyboard 6 is pressed without inputting the address, the address stored in the buffer register RBF is set in the program counter PC of the actual CPU.

FIG. 2 is a flowchart showing the above-described control procedure performed by the CPU 4. When there is input from the keyboard 6, the CPLI 4 receives the input (buoy 1).
and stores it in the input register RIN (step 101
．． 1Q2). After executing step 101 or 102, the process proceeds to step 103, where it is determined whether or not there is a command input (SET-PC key) for setting an address in the program counter PC. If there is this command input, then in the next step 104 it is determined whether the input register RIN is cleared or any data is stored therein. If there is data in the input register RIN, the data is transferred to the barafun register RBF in the step 105.
At the same time, the input register RIN is cleared, and the process proceeds to step 106.

If there is no data in the input register RIN, step 1
Skip step 05 and proceed to step 106.

In step 106, the contents of buffer register RBF (
address) is displayed on the display 8. Next step 107
Then, the address stored in the buffer register RBF is set in the program counter PC of the real mcpui.

That is, if the SET/ρC key is pressed after an address has been entered, that address is set in the program counter PC and also in the buffer register RBF. Also, if the address is not set and SET -
When the PC key is pressed, the address stored in the buffer register RBF is kicked into the program counter PC.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing an embodiment of the present invention, and FIG. 2 is a flowchart showing a control procedure according to the present invention by the CPU 4 of the debugging device B. As shown in FIG. 1... Actual CPU 2... Actual memory PC... Program counter 3... Interface circuit 4...
...CPU 5...Memory RIN...Input register RBF...Buffer register 6...Keyboard 8... Display 2nd figure 1℃n, Kariri

Claims (1)

[Claims] (1) A device that performs program debugging by extracting address signals, data bus signals, and control signals from the lead terminals of an actual CPU or the system bus.
An input means for inputting an arbitrary address from Sera 1 to the program counter of the PIJ, a storage means for storing the address input by the input means, and a predetermined command input immediately after the address input by the input means. means for setting the address in the program counter of the real CPU when the address is inputted by the inputting means; 1. A debugging device comprising: a means for letting a program counter of an actual machine CP LJ.