JPS59119521A - Data reproducer - Google Patents

Abstract

PURPOSE:To ensure automatic compensation for the deviation of a strobe point and to reduce greatly the reproduction data error factor, by using the input/ output signal and the clock of a strobe circuit to obtain the deviation information of the strobe point and controlling automatically a clock phase shifting circuit with the integration value of the deviation information. CONSTITUTION:The reproduction clocks given from PLL circuits 7-9 are automatically controlled by a clock phase shifting circuit 10 so that the rise point is equal to the best identification point. The phase deviation is obtained in the form of an output (r) of an Ex-OR16 which uses the input signal (e) and the output signal (k) of a strobe circuit 11 as an input, respectively. The detection signal (s) of a circuit consisting of a strobe circuit 15, an inverter 17 and an Ex- NOR18 is multiplied by the clock through an AND circuit 19. An OR circuit 20 adds an inserted clock (t) to the waveform (r), and the phase deviation data (u) is integrated by an integration circuit 21 to obtain a clock phase shift controlling signal having less variance. For the clock delivered from the PLL circuit, the strobe point deviation is compensated by a phase shift controlling signal.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Application] The present invention relates to a data reproducing device suitable for reproducing digital FM signals.

[Prior art]

As one of the methods of modulating digital signals, the digital signals are modulated by so-called FM (Frequency Mod).
A digital FM method (also called a Bi-PhalIe Mark method) that modulates a frequency modulation (frequency modulation) signal is well known.

This digital FM system, for example, [as described in Nikkei Electronics J, December 1978 issue, page 128, the state inversion interval is set to 1/2 of the bit period (T) at the minimum and to the bit period at the maximum. They are characterized in that they can be made equal to each other, and clock recovery and data demodulation are easy.

FIG. 1 shows a waveform diagram of a signal obtained using this digital FM method. In the figure, (a) shows a serial data string with a bit period T of a digital signal, and (b) shows a digital FM signal based on this data.

As shown in this figure, the digital FM method is
The state is always inverted at data boundaries, and for data "1", the state is inverted at a time 0.5T behind the data boundary. As a result, as shown in fbl in the figure, for the data of the digital signal, the edges of adjacent rising and falling edges of the signal EHy E2*...
The time interval of the song is a signal form having only two values, 0.5T and T.

FIG. 2 shows a conventional example of restoring a digital FM signal. Further, FIG. 3 shows waveforms of various parts of the data reproducing circuit of FIG. 2. In addition, Figure 3 (al is Figure 1 t)
This is the same serial data as a+.

In FIG. 2, a digital FM signal transmitted from a transmission source 1 passes through a transmission path 2.

The signal is amplified by a regenerative amplifier 3 and waveform-equalized by a regenerative equalizer 4. Then, a signal as shown in FIG. 3(d) is obtained. Here, the zero point Z of the signal in Fig. 3(d)
, j Z21 ・・・・・・・・・ is shown in Figure 3 tel
Record shown in . Digital FM signal edge E I H
E! H...... Characterized to correspond to Pa. Therefore, if the output signal (dl) of the reproduction equalizer 4 is amplified to the limit by the limiter or comparator 5, the digital F corresponding to the digital transmission signal (e) as shown in FIG.
The M signal (e) can be restored.

However, since this restored signal te+ is affected by code amount interference, jitter noise, etc., re-identification is performed at the waveform center point of the 0, 5 T signal, which is the best identification point of the signal (e). , it is necessary to play data. □
First, from this restored digital FM signal +e+,
The edge detection circuit 6 extracts edge information as shown in FIG. L L (PhaseLoc
ked Loop) circuit performs lock playback as shown in Figure 3 (hl).

Next, using the rising or falling edge of the recovered clock (hl) as a trigger, the restored digital FM signal (el
is re-identified by a strobe circuit 11 composed of a D-flip-flop or the like. As a result, a reproduced digital FM signal (il) from which effects such as code amount interference and jitter noise have been removed is obtained.The above reproduced digital FM signal +1
1 is output from the output terminal 12 to a digital signal decoding circuit (not shown), and the digital signal is converted into an analog signal and decoded. In this example, the rising edge of the reproduced clock (h) 81 r S2 +Sa + Sa...
It is clear from the figure that the strobe circuit 11 is triggered by .

The above is the data reproduction power method of the general digital FM system.

In the data reproduction process, one of the factors that has a large relationship with the bit error rate is the deviation of the strobe point of the strobe circuit 11, that is, the waveform center of the 0.5T signal of the restored digital FM signal (e). An example of this is a shift in the rising or falling point of the recovered clock from that point.

Now, as an example, the bit period T of the digital signal is 1 in T.
72ns, i.e. data transmission rate 5,8 Mbi
FIG. 4 shows the bit error rate versus strobe point deviation characteristics in the case of t/s. Here, since the data transmission rate of the digital signal is 5.8 Mbit/s,
The clock frequency of digital FM method is 11.6MHz
Therefore, the possible range of strobe point deviation is approximately ±
It becomes 43.108.

As is clear from FIG. 4, if the strobe point deviates by ±Ions from the best discrimination point, the error rate worsens by about one order of magnitude. Therefore, it is necessary to suppress the strobe point deviation to zero as much as possible.

Therefore, there is a problem in that complicated adjustments must be made for each device, resulting in high adjustment costs. Furthermore, there is a problem in that compensating for temperature characteristics and aging changes is extremely in-depth.

〔the purpose〕

SUMMARY OF THE INVENTION An object of the present invention is to solve the above-mentioned problems and to provide a data refraud device that automatically corrects strobe point deviations.

〔overview〕

The feature of the present invention is to reduce the number of clock regeneration circuits that regenerate clocks based on digital signals modulated and transmitted as digital FM signals, and strobe circuits that regenerate data from digital FM signals using the regenerated clocks as triggers. By using a data reproducing device equipped with a data reproducing device to obtain strobe point deviation information using the input/output signals and clock of the strobe circuit, and automatically controlling the clock phase shift circuit using this integrated value, the deviation of the strobe point can be detected. There is a point system that automatically corrects.

〔Example〕

The basic concept of the present invention will be explained below with reference to FIG.
This will be explained using a signal waveform diagram. Deviation information is required to correct strobe point deviation.

Now, in the data reproducing circuit shown in FIG.
The output signal, that is, the reproduced digital FM signal is the fifth
The waveform shown in Fig. 5 (kl +c) is obtained. Here, Fig. 5 (j)
is a clock shifted from the optimum strobe point by ΔT.

From this waveform (k), it can be seen that the reproduced digital FM signal has strobe point information, that is, the strobe point information.

The phase deviation amount of the best discrimination point is determined by the strobe circuit 11.
Exclusive OR of the input and output signals of
OR.

Hereinafter, it will be abbreviated as Ex-OR. ) can be obtained by taking 5) is the output of Ex-OR and represents the amount of phase deviation in terms of pulse width.

Here, if one phase deviation amount, that is, the pulse width is Δθ, the best discrimination point is at the center of the 0.57 signal, so it can be expressed as follows.

However, as is clear from FIG. 5(e), the data representing the amount of phase deviation D + r D 2...
The number of ・ changes depending on the ratio of 0" and "1" in the recorded data. When the ratio of 1" is large, the number of phase deviations is large, and the ratio of θ" is large. When the amount of phase deviation is large, the number of data is small. Therefore, the Ex-OR output of the input/output signals of the strobe circuit 11 cannot be used as one phase deviation information as it is.

Therefore, in the present invention, one recorded data is 0''.

They detected the "1" part and devised two methods based on that information.

First, the first method uses the detection information of the data "0" part to insert one clock into the data "O" part as phase deviation data, as shown in FIG. 5 (nl). This method prevents the phase deviation information from being fluctuated by the division of transmission signal data between "0" and 1, and corrects the phase deviation using the integral value of the generated phase deviation data (fn).

The second method is to delete one of the phase deviation data in the data "1" portion, as shown in FIG.

Then, the phase deviation information is prevented from being fluctuated by the transmission signal data string, and this generated phase deviation data (o)
This method corrects the phase deviation using the integral value of .

The two methods of the present invention described above will be explained below using Examples.

First, an embodiment of the present invention in which one clock in a 10" portion of the transmission signal data is inserted as phase deviation data will be explained from the end of Figure 6. Figure 7 shows the waveforms of each part of this Figure 6. FIG.

This embodiment has some common features with the data reproducing circuit shown in FIG. 2 above. Therefore, these common parts are given the same reference numerals. Further, since the functional operation of this common part is as described in FIG. 2, detailed explanation will be omitted.

6, a digital FM signal transmitted from a transmission source 1 passes through a transmission line 2, is amplified by a regenerative amplifier 3, and is waveform-equalized by a regenerative equalizer 4.

When the output signal of the reproduction equalizer 4 is amplified to the limit by a limiter or a comparator 5, the output signal shown in FIG.
The digital FM signal can be restored.

However, the restored digital FM signal tel is affected by code amount interference, jitter noise, etc.

It is necessary to perform data reproduction. Therefore, the output signal te+ of the comparator 5 is input to the edge detection circuit 6 to extract edge information. Then, based on this edge information, the phase detector 7. Lightning, pressure controlled oscillator (VCO) 8
．． A PLL circuit composed of a loop filter 9 performs clock recovery. This recovered clock is input to the clock phase shift circuit 1 (NC) and is automatically adjusted so that the rising point of the recovered clock is at the best discrimination point for data reproduction, that is, the center of the 0.5T signal.

This phase shift control signal is obtained as follows. Now, assuming that the rising point of the reproduced clock, that is, the strobe point, deviates from the best discrimination point as shown in FIG. 7(p), the amount of deviation of the strobe point.

In other words, the phase +i difference amount is calculated by Ex
16 outputs. The waveform is shown in FIG. 7(r).

Further, the above-mentioned detection of data "o" is performed by a circuit composed of a strobe circuit 15, an inverter 17 and an EX-NOR 18. That is, the strobe circuit 15
Ex-NOR is performed between the data delayed by T/4, which is the output of the strobe circuit 15, and the undelayed data, which is the input signal of the strobe circuit 15. Waveform (s)
are the detection signals of data "0" and "0" detected by the above circuit.

The detection signal (8) of this data "'0" part and the clock t
The AND circuit 19 performs the multiplication with p+ to obtain the inserted phase deviation data, that is, the inserted clock.
becomes. The above inserted clock (1) and EX-OR circuit 16
1 phase deviation data (U) is obtained by adding the output waveform (rl and η) with the OR circuit 20.

By integrating the phase deviation data (ul) using the integrating circuit 21, a clock phase shift control signal with less fluctuation is obtained.

The strobe point deviation of the clock output from the PLL circuit is corrected by the thus obtained phase shift control signal. The strobe circuit 11 is triggered by the clock with this strobe point deviation corrected, and a digital FM signal from which the influence of code amount interference, jitter, noise, etc. has been removed is output from the output 1/1il12.

As is clear from the above description, according to this embodiment, a phase shift control signal can be obtained that is proportional to the strobe point and is not affected by the data string. Therefore, according to this embodiment, the deviation of the strobe point that occurs due to the oscillation frequency deviation of the voltage controlled oscillator of the PLL circuit due to the influence of temperature change or aging, and which cannot be corrected by the initial fixed adjustment, can be corrected. Can be removed very effectively. Furthermore, since the phase shift control signal obtained according to this embodiment is obtained by integrating the phase deviation data (ul), it has the characteristic that it is not easily affected even if a data error occurs.

Next, another embodiment of the present invention will be described with reference to FIG. 8, in which a tarok is inserted as phase deviation data into the 0'' portion of the transmission data, similar to the embodiment described above.

FIG. 9 is a diagram showing waveforms at various parts in FIG. 8.

This embodiment has some parts common to the data reproducing circuit shown in FIG. 2 and the circuit shown in the embodiment shown in FIG. 6, and the common parts are given the same reference numerals. Further, since the function and operation of this common part is the same as described in FIGS. 2 and 6, detailed explanation will be omitted.

In FIG. 8, the digital F transmitted from transmission source 1
The M signal passes through a transmission path 2, is amplified by a regenerative amplifier 3, and is waveform-equalized by a regenerative equalizer 4. When the output signal of the reproduction equalizer 4 is amplified by the limiter or the comparator 5, the digital FM signal shown in FIG. 9 (el) is restored.

However, the restored digital FM signal ie) is affected by code amount interference, jitter noise, etc., as described in the first embodiment, and it is necessary to perform data reproduction. Therefore, the output signal (el) of the controller 5 is input to the edge detection circuit 6 to extract the engineering information.

Then, based on this edge information ζ, the phase detector 7
．． '! Voltage controlled oscillator veo) 8, loop filter 9
Clock regeneration is performed by a PLL circuit consisting of.

This reproduced clock is input to the clock phase shift circuit 10,
The rising point of the recovered clock is automatically controlled to be the best discrimination point for data recovery, that is, the center of the waveform of the 0.5T signal.

This phase shift? The 11j control signal is obtained as follows.

Now, suppose that the rising point of the recovered clock, that is, the strobe point, is shifted from the best discrimination point as shown in Figure 9 (f/)ζ. is an Ex-O whose inputs are the input signal (el) and the output signal (k') of the strobe circuit 11.
It is obtained as the output signal of R16.

This waveform is shown in FIG. 9 (r').

Furthermore, the above-mentioned detection of the data "0" portion is performed by transmitting the output signal of the strobe circuit 11 to the strobe circuit 15 at 70.
The output signal of the 771% phase circuit 10 is
By triggering with the tarock inverted at , a signal delayed by V4 from the output signal of the strobe circuit 11 is obtained. Then, Ex-NOR the signal delayed by T/4 from C1 and the human input signal to the strobe circuit 11.
The R circuit 18 performs a fortune telling. The output of the Ex-NOR circuit 1B has a waveform as shown in FIG. 9 (rs').

The AND circuit 19 multiplies the detection signal (B') of the data "0" portion by the tarokk (p') output from the clock phase shift circuit 10 to obtain the waveform shown in FIG. 9 (t').

The phase deviation data (U') is the output of the AND circuit 19 (
It is obtained by adding t ri and the output (r') of the gx-OR circuit 16 using the OR circuit 20.

Then, by integrating the phase deviation data (U') in an integrating circuit 21, a control '4I signal for the clock phase shift circuit 10 is obtained.

By the way, when the phase deviation is zero, the pulse width representing the amount of phase deviation is T/4 according to equation (1), and the number of data of the phase deviation is the same as the number of clocks.

Therefore, the integrated value obtained by inputting the clock to the integrating circuit 22 having the same characteristics as the above-mentioned integrating circuit 21 is equal to the output level of the integrating circuit 21 when the phase deviation is zero. Therefore, if the clock phase shift circuit 10 is operated using the output of the integrating circuit 22 which inputs the clock as a reference level, initial adjustment of the clock phase shift circuit 10 is not necessary.

The strobe point deviation of the clock outputted from the PLL circuit is corrected by the clock phase shift circuit 1O using the phase shift control signal obtained by such a shift and the reference level which is the output of the integration circuit 22.

The strobe circuit 11 is triggered by the clock corrected for the deviation of the strobe point, and the output terminal 12 outputs a digital FM (number i) from which the effects of code amount interference, jitter, noise, etc. have been removed.

Next, still another embodiment of the present invention will be described with reference to FIG. 10, in which one of the phase deviation data obtained from the I+ 111 portion of the recording signal data is deleted.

FIG. 11 is a diagram showing waveforms of various parts in FIG. 10. This embodiment has some parts in common with the data reproducing circuit shown in FIG. 2, and the common parts are given the same reference numerals. Further, since the functional operation of this common part is as described in FIG. 2, detailed explanation will be omitted.

In FIG. 10, a digital FM signal transmitted from a transmission source 1 passes through a transmission line 2, is amplified by a regenerative amplifier 3, and is waveform-equalized by a regenerative equalizer 4. When the output signal of the reproduction equalizer 4 is amplified by the limiter or the comparator 5, the digital FM, 1! shown in FIG. ,
It is affected by code amount interference, jitter, noise, etc., and it is necessary to reproduce the data.

Therefore, after inputting the output signal tel of the comparator 5 to the edge detection circuit 6 and extracting the edge information,
Based on this edge information, the phase detector 7. Pressure controlled oscillator (VCO)8. P composed of loop filter 9
Clock regeneration is performed using the LL circuit. The regenerated clock is
The rising point of the recovered clock input to the clock phase shift circuit 10 is the best discrimination point for data recovery, that is, 0.5 T.
It is automatically controlled so that the waveform center of the signal is centered at I.

This phase shift control signal is obtained by first-order ζ.

Now, suppose that the rising point of the recovered clock, that is, the strobe point, is shifted from the best discrimination point as shown in FIG. , the input signal (e) and the output signal (k') of the strobe circuit 11 are input to E.
It is obtained as the output signal of x-OR16. This waveform is shown in FIG. 11 (r').

By the way, a signal for deleting one of the phase deviation data obtained from the portion of the recording signal data 1'' mentioned above can be obtained as follows.

First, edge information of the output signal of the strobe circuit 11 is extracted by the edge detection circuit 24. The waveform is shown in Figure 11 (9
It becomes 1. Next, using this edge information as a trigger, -7
Mono-stable multivibrator
A Multi Vlbrator (abbreviated as MMV) 25 is operated to obtain the waveform shown in FIG. 11(b).

Next, using the output signal of the MMV25 as a trigger, T
/2 Operate the MMV26 to obtain a signal for deleting one piece of phase deviation information in the data "engine" part shown in FIG. ) is performed by the AND circuit 23 to obtain phase deviation data (u") in which one of the two pulses in the data "1" portion is deleted as an output signal.

The phase deviation data (U') is integrated by an integrating circuit 21 and is then used as a phase shift control signal for the clock phase shift circuit 10.

The strobe point deviation of the clock output from the PLL circuit is corrected in the clock phase shift circuit 10 using the thus obtained phase shift control signal. The strobe circuit 11 is triggered by this corrected clock,
The output end 12 outputs a digital FM signal from which effects such as code amount interference, jitter, and noise have been removed.

In each of the embodiments described above, the tarock phase shift circuit is subjected to feedback control, but feedforward control may also be performed.

Next, an embodiment of the present invention in this case will be described.

FIG. 12 is a block diagram showing an embodiment of the present invention using feedforward control. This embodiment has some parts in common with the embodiment shown in FIG. 6, and the common parts are given the same reference numerals. Further, since the functions and operations of the common parts are as described in FIG. 6, detailed explanation will be omitted.

In Figure 12, digital FM (No. 1) transmitted from transmission source 1 passes through transmission path 2 and then is transmitted to regenerative amplifier 3.
The signal is amplified by a reproduction equalizer 4, and its waveform is equalized by a reproduction equalizer 4. When the output signal of the reproduction equalizer 4 is amplified by a limiter or a comparator 5, the digital FM signal can be restored. However, the restored digital FM signal is affected by code amount interference, jitter, noise, etc., and requires data reproduction.

Therefore, the output signal of the comparator 5 is input to the edge detection circuit 6 to extract edge information, and then, based on this edge information, a phase detector 7, an IL pressure controlled oscillator (VCO) 8. PLL composed of loop filter 9
Tarot cards are played back in the circuit. First, using this clock, the strobe circuit 27 is triggered and data is reproduced to obtain a strobe point deviation, that is, a phase deviation.

The deviation of the strobe point is caused by the Bx-OR circuit 1 which receives the input signal δ of the strobe circuit 27 and the output signal.
It can be obtained as the output of 6. In addition, the detection of data "0" is performed by the strobe circuit 15, the inverter 17 and the Ex-NO
A circuit consisting of an R circuit 18 and a strobe circuit 15.
Ex- of the T/4 delayed data which is the output of
This is done by taking the NOR. This data ″o
The AND circuit 19 multiplies the n detection signal and the clock. How to output the above Ex-OR circuit 16 and AND circuit 1
The addition with the output of 9 is performed by the OR circuit 2o, and phase deviation data is obtained.

The phase deviation data is integrated by an integrating circuit 21, thereby obtaining a clock phase shift control signal with less fluctuation.

The clock phase shift circuit 10 is feedforward controlled on the clock phase shift side m (i number '?').The strobe circuit 11 is triggered by the clock whose strobe point deviation has been corrected by the clock phase shift circuit 1o. A reproduced digital FM signal is obtained from the output end 12. This reproduced digital FM signal is output to a digital signal decoding circuit (not shown), and the digital signal is demodulated into an analog signal.

The above is an example of feedforward control using data "O".
Although a case has been described in which a method of inserting phase deviation data in the data 1'' portion is used, the same effect can be obtained using a method of deleting phase deviation data in the data 1'' portion.

Next, a specific circuit example of the clock phase shift circuit 10, which plays an important function in the present invention, will be explained using FIG. 13. FIG. 14 shows the waveform openings of each part in FIG. 13.

In FIG. 13, transistors Q1 to Q7 and resistor R1
The portion formed by R10 and capacitors CI and C2 is a Miller integration circuit. Tarock a input from the input terminal 28 is integrated with a time constant determined by the resistor R2 and the capacitor C1, and is output from the emitter of the transistor Q6. The integral waveform becomes the waveform shown in FIG.
input to a comparator consisting of 4. Here, a circuit composed of transistors Q15 to Q18 and resistors R15 to R18 is a bias circuit, and supplies voltage to a Miller integration circuit and a comparator.

The integrated value of the clock explained in FIG. 8 is applied to the base of the transistor Q8 of the comparator through the input terminal 29. Further, the integrated value of the phase deviation data is applied to the base of the transistor QIO through the input terminal 30.

Therefore, the output signal of the Miller integration circuit is input to the base of the transistor Q8 with the integrated value of the clock as a DC bias, and the integrated value of the phase deviation data is input as a DC bias to the base of the transistor Q10. I will do it. Therefore, as shown in FIG. 14(e), depending on the integral value of the phase deviation data, that is, the shift of the strobe point.

The slice level of the comparator changes, and the output signal of the comparator becomes as shown in FIG. 3(d). Therefore, the rising and falling points of the clock change.

The phase-shifted tarok is outputted from the emitter of the transistor Q13 to the output terminal 31 by 1lffi to a strobe circuit (not shown). Since the strobe circuit operates at the rising or falling edge of the clock, the duty ratio of the clock is not affected.

The data reproducing device of the present invention has been described above using embodiments, but any embodiment can be used to optimally control the data strobe timing and significantly improve the error rate of digital signal reproduction. can do.

The present invention provides a method for inserting tarock as phase deviation data into the data "θ" part of a digital FM signal, and one of the phase deviation data obtained from the data "1" part.
It is clear that the method of deleting the section is basically the same as the other method, and that there is no problem in using a circuit configuration other than the above-mentioned embodiment.

In addition, the digital FM signal has a data time interval of 0.5T,
Add a signal with a width of 1 or 5T different from T as a synchronization signal,
A signal that is easy to distinguish as a synchronization signal can be implemented using the circuit configuration shown in the above embodiment, and the effectiveness of the present invention remains unchanged.

Furthermore, it goes without saying that the effects of this embodiment do not depend on the characteristics of the digital FM signal transmission path itself, and are effective for any transmission path.

〔effect〕

As described above, according to the present invention, the strobe point can be fixed without depending on the transmission data string of the digital signal, without requiring complicated adjustment, and without being affected by temperature characteristics or aging. deviations can be automatically corrected. Further, the present invention can be realized with an inexpensive and simple circuit configuration. Furthermore, there is the effect that the reproduced data error rate can be significantly reduced.

[Brief explanation of the drawing]

Figure 1 is a waveform diagram for explaining the digital FM signal.
Figure 2 is a block diagram showing an example of a conventional reproducing circuit;
The figure is a waveform diagram of each part of FIG. 2, FIG. 4 is a diagram showing an example of strobe small Indian deviation versus bit error rate, FIG. 5 is a waveform diagram for explaining the present invention in detail, and 6.8. Figures 10-h and 12 are block diagrams showing one embodiment of the present invention, Figures 7.9 and 11 are waveform diagrams of various parts of Figures 6, 8 and 10, respectively, and Figure 13 is a block diagram showing an embodiment of the present invention. FS14, a circuit diagram showing a specific example of the clock phase shift circuit used in the example, is a waveform diagram of each part of FIG. 13. 10...Clock phase shift circuit, 11.15...Strobe circuit, 21.22...Integrator circuit-24...Edge detection circuit-25, 26...Mono multivibrator Fig. 3 Fig. 4 -40-30-"20-10 0 10 20 30
40 strokes O-7"-;'l;'J (n
s) Figure 5 Figure 7 ↑ 1°C Figure 9 Figure 11 Figure 14

Claims (4)

[Claims] (1) A data reproducing device that includes at least a clock reproducing circuit that regenerates a clock based on a digital signal that has been modulated and transmitted as a digital FM signal, and a strobe circuit that uses the clock as a trigger to regenerate data from the digital FM signal. The device includes a clock phase shift circuit for controlling the phase of the clock, and means for controlling the clock phase shift circuit according to No. 11 using the clock and the input (No. 6 and output signal) of the strobe circuit, A data reproducing device characterized in that a deviation of a strobe point in the strobe circuit is automatically corrected. (2) The means for controlling the clock phase shift circuit includes an exclusive OR circuit which receives input signals and output signals of the strobe circuit, and a pulse for one cycle of the clock only during the period of transmission data "θ". The output number of the integrator is 2. The data reproducing apparatus according to claim 1, wherein said clock phase shift circuit is controlled by a iron. (3) The means for controlling the clock phase shift circuit includes an exclusive OR circuit which receives input signals and output signals of the strobe circuit, and outputs the exclusive OR circuit only during the period of transmission data "1". The clock phase shift circuit is characterized by comprising a signal deletion circuit that deletes a part of the pulse, and an integrator that integrates the output of the signal deletion circuit, and the clock phase shift circuit is controlled by the output of the integrator. Said claim 1
The data reproducing device described in Section 1. (4) The clock phase shift circuit is controlled in accordance with the output potential of the integrator and the output potential of the second integrator that integrates the recovered clock.
(j) A data reproducing device according to claim 4 (2).