JPS59119038U - Flat package IC - Google Patents

Flat package IC

Info

Publication number
JPS59119038U
JPS59119038U JP1240183U JP1240183U JPS59119038U JP S59119038 U JPS59119038 U JP S59119038U JP 1240183 U JP1240183 U JP 1240183U JP 1240183 U JP1240183 U JP 1240183U JP S59119038 U JPS59119038 U JP S59119038U
Authority
JP
Japan
Prior art keywords
case member
flat package
flat
package
electronic circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1240183U
Other languages
Japanese (ja)
Inventor
岩崎 勝四郎
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP1240183U priority Critical patent/JPS59119038U/en
Publication of JPS59119038U publication Critical patent/JPS59119038U/en
Pending legal-status Critical Current

Links

Landscapes

  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本案一実施例の正面図、第2図は第1図の側面
図で、プリント基板に組立た状態をも示す。 11はケース部材、133〜13dはリード端子、20
a、20bは突起、14はプリント基板、21a、21
bは嵌合孔、17a〜17dはプリント導箔を示す。
FIG. 1 is a front view of an embodiment of the present invention, and FIG. 2 is a side view of FIG. 1, also showing the assembled state on a printed circuit board. 11 is a case member, 133 to 13d are lead terminals, 20
a, 20b are protrusions, 14 is a printed circuit board, 21a, 21
b indicates a fitting hole, and 17a to 17d indicate printed conductive foils.

Claims (1)

【実用新案登録請求の範囲】 所定の電子回路を絶縁性で平板状のケース部材に収納し
、該ケース部材の側面に、内部で前記電子回路に接続さ
れた複数のリード端子を突設したフラットパッケージI
Cにおいて、 前記ケース部材の底面に一対の突起を前記ケース部材と
一体に形成して成るフラットパッケージC
[Claims for Utility Model Registration] A flat device in which a predetermined electronic circuit is housed in an insulating flat case member, and a plurality of lead terminals internally connected to the electronic circuit are protruded from the side surface of the case member. Package I
In the flat package C, a pair of protrusions are formed integrally with the case member on the bottom surface of the case member.
JP1240183U 1983-01-31 1983-01-31 Flat package IC Pending JPS59119038U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1240183U JPS59119038U (en) 1983-01-31 1983-01-31 Flat package IC

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1240183U JPS59119038U (en) 1983-01-31 1983-01-31 Flat package IC

Publications (1)

Publication Number Publication Date
JPS59119038U true JPS59119038U (en) 1984-08-11

Family

ID=30143803

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1240183U Pending JPS59119038U (en) 1983-01-31 1983-01-31 Flat package IC

Country Status (1)

Country Link
JP (1) JPS59119038U (en)

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