JPS59104569U - Printed circuit board test terminal device - Google Patents

Printed circuit board test terminal device

Info

Publication number
JPS59104569U
JPS59104569U JP1982197133U JP19713382U JPS59104569U JP S59104569 U JPS59104569 U JP S59104569U JP 1982197133 U JP1982197133 U JP 1982197133U JP 19713382 U JP19713382 U JP 19713382U JP S59104569 U JPS59104569 U JP S59104569U
Authority
JP
Japan
Prior art keywords
test terminal
circuit board
printed circuit
terminal device
board test
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP1982197133U
Other languages
Japanese (ja)
Inventor
栗原 泰治
Original Assignee
日本電気ホームエレクトロニクス株式会社
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by 日本電気ホームエレクトロニクス株式会社 filed Critical 日本電気ホームエレクトロニクス株式会社
Priority to JP1982197133U priority Critical patent/JPS59104569U/en
Publication of JPS59104569U publication Critical patent/JPS59104569U/en
Pending legal-status Critical Current

Links

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Multi-Conductor Connections (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本案−実施例の断面図、第2図は本案の他の実
施例のテスト端子の斜視図である。 11は絶縁性基板、14.)7は孔、15はランド部、
23.30はテスト端子、18.19は先端部、21は
接続部、25.26は半田を示す。
FIG. 1 is a sectional view of an embodiment of the present invention, and FIG. 2 is a perspective view of a test terminal according to another embodiment of the invention. 11 is an insulating substrate; 14. ) 7 is the hole, 15 is the land part,
23.30 is a test terminal, 18.19 is a tip, 21 is a connecting portion, and 25.26 is a solder.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] ・  絶縁性基板の表面から裏面に隣接して貫通した2
個の孔と、前記絶縁性基板の裏面で前記1個の孔の周り
に形成された半田付は可能なランド部と、前記2個の孔
に挿入され、前記絶縁性基板の裏面から所定量突出され
た2個の先端部と該先端部を前記絶縁性基板の表面で相
互に接続する接続部とから成るテスト端子と、該テスト
端子の先端部で前記ランド部を有する孔に挿入された側
の1つと前記ランド部との間に付着された半田とから成
るプリント基板のテスト端子装置。
・ 2 holes that penetrate from the front surface of the insulating substrate adjacent to the back surface
a solderable land portion formed around the one hole on the back surface of the insulating substrate; A test terminal consisting of two protruding tips and a connection part that connects the tips to each other on the surface of the insulating substrate, and the tip of the test terminal is inserted into the hole having the land part. A printed circuit board test terminal device comprising solder deposited between one of the sides and the land portion.
JP1982197133U 1982-12-29 1982-12-29 Printed circuit board test terminal device Pending JPS59104569U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP1982197133U JPS59104569U (en) 1982-12-29 1982-12-29 Printed circuit board test terminal device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP1982197133U JPS59104569U (en) 1982-12-29 1982-12-29 Printed circuit board test terminal device

Publications (1)

Publication Number Publication Date
JPS59104569U true JPS59104569U (en) 1984-07-13

Family

ID=30422470

Family Applications (1)

Application Number Title Priority Date Filing Date
JP1982197133U Pending JPS59104569U (en) 1982-12-29 1982-12-29 Printed circuit board test terminal device

Country Status (1)

Country Link
JP (1) JPS59104569U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017135191A (en) * 2016-01-26 2017-08-03 株式会社アンド Method and apparatus for judging whether soldering is good or bad

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555656U (en) * 1978-06-28 1980-01-14

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS555656U (en) * 1978-06-28 1980-01-14

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2017135191A (en) * 2016-01-26 2017-08-03 株式会社アンド Method and apparatus for judging whether soldering is good or bad

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