JPS5891494A - Indication control of display - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention provides a display device for a cathode ray tube CRT, particularly a display device for displaying characters.
C for character display with a control function for display character attributes
The present invention relates to a display control method for enlarging a part or all of a display screen using an RT controller.

The attribute referred to here corresponds to the display character code and specifies the display state of the displayed character, such as brightness modulation, blinking, etc., and the effect is determined by the control signal output at the same time as the display character code corresponding to the attribute. It is something that shines.

In the present invention, a general-purpose attribute is set as one of the attributes, a special control code is placed in the part corresponding to the display character code corresponding to the attribute, and the special control code is extracted by the corresponding control signal. , and by processing this, display control such as enlargement of displayed characters subsequent to the above-mentioned special control code is performed.

In other words, the present invention mixes the signal number of the display character code with the special function control code signal, and processes the special function control code signal and these signals to generate the above display character. It was developed for the purpose of enlarging some or all of the displayed characters by combining it with a display control device.

Furthermore, to specifically describe one of the advantages of the present invention, it is possible to perform enlarged display at any magnification by using only one type of character generator and adding a simple circuit. In other words, the present invention has the advantage that the horizontal magnification, vertical magnification, etc. can be set independently, and in addition, the magnification can be set for each character in the horizontal direction and for each line in the vertical direction.

On the other hand, if the above-mentioned thing is to be realized using the conventional method, it is necessary to prepare a large number of characters and generators corresponding to each value of the special function control code, for example.

First, embodiments of the present invention will be described with reference to the attached drawings ζ.

On the right side of Figure 1 (11 is a raster scan type CRT)
(cathode ray tube), this CRT (1) is, for example, a second
As shown in FIG. The dashed line in the horizontal direction is the horizontal retrace line HL that returns the scanning line SL to its original position in the horizontal direction, and is not displayed on the CRT (11). Further, the slightly vertical dashed line in FIG. 2 is a vertical retrace line VL that returns the scanning line SL to its original vertical position ζ and is not displayed on the CRT (11).

The vertical retrace VL is the vertical retrace stroke number vrs in FIG.
Further, as is clear from FIG. 2, for example, one character is displayed in a matrix configuration of 8 dots horizontally and 12 dots vertically, a total of 96 dots.

Next, (2) on the lower left side of FIG. 1 is a pulse generator, and as shown in FIG. 4, this generator generates one dot period 1. For example, period T. , T1. A clock pulse DOTCK is generated that defines .about.T. (3) is a counter, and this counter is clock pulse DOTCK
is input and counted, and outputs a character clock signal CCLK corresponding to the display period of one character, that is, the horizontal 8-bit period T0 to T, and also outputs the character clock signal CCLK corresponding to the horizontal 8-bit period T0 to T,
The first timing signal t6 indicates the period T6 of the seventh bit of the 8th horizontal bit period T. - A second timing signal t7 indicating the period T of the 8th bit of T7 is output (omitted in FIG. 4).

The symbol (4) in the upper right corner of Figure 1 is a character generator, which usually uses a ROM, and as shown in Figure 4, it generates an 8-bit parallel character code signal CC' and a 4-bit parallel line count signal. LC' are input, and the character data at the address specified by these signals, that is, the 8-bit parallel dot pattern signal dtp, is output as shown in FIG. Specifically, referring to FIG. 2, the character generator 4 is designated with the character code signal CC', for example, the leading address where data of character "A" is stored, and then the character generator 4 is designated with the character code signal CC'. '
For example, the line number L of the data of character "A"
The line number LNO from NO, LNI to LNI 1 is specified, and the dot data at this address is ``'' 0001
1000” as 8-bit parallel dot pattern signal dt
0 (5) is a juxtaposed converter, which is composed of a shift register, etc., and inputs and converts the parallel dot pattern signal atp from the character generator 4. As shown in FIG.
The video signal vds instructs the blinking of the scanning line SL. Note that the juxtaposed transducers 5 are as shown in FIG.
Load the parallel dot pattern signal dtp with the timing signal t7/ and the aforementioned dot clock DOTCK.
Perform bit shift with .

The controller on the left side of Figure 1 is a CRT (11), which is made up of a high-density integrated circuit LSI, etc., and exchanges various signals with a signal processing circuit CPU that includes memory, and processes these signals. In other words, the controller 7 of the C-RT (1) inputs data from the signal processing circuit CPU, etc., and outputs the display period of one character from the counter 3! , -T, and outputs an 8-bit parallel character code signal CC1, a 4-bit parallel line count signal LC, and a general-purpose control signal GPA, respectively.

Here, storage of display data in a memory (not shown) will be explained. First, in the normal 1x mode, one piece of display data is stored, for example, at address 1 of the memory, as shown in FIG. 9(1).

Next, the case of horizontal enlargement is shown in FIG. 9 (2).

Horizontal magnification signal MH immediately before the character to be enlarged
Place a special control code that specifies.

The case of vertical enlargement is shown in FIG. 9(3). What must be noted here is that the clear signal LCCLR must be set to 1 in the first special control code (shown as a phantom in the figure) that specifies a set of vertical magnifications MY. This will be explained later. External line counter 19
This is for resetting the .

Also, although not shown, it is of course possible to expand both horizontally and vertically by the combination of +21 and (31 in Figure 9).

On the other hand, the controller 7 of c RT (1) is as shown in FIG.
Each outputs a vertical retrace signal VRT.

Note that the 4-bit parallel line count signal LC is obtained by counting the horizontal retrace signal HRT within the controller 7. In this case, the second. As shown in FIG. 4, scan 1i! SLL12
2(7) - Counting of the scanning line SL, that is, the horizontal retrace signal HRT, is repeated every 12 so as to correspond to the number LNO, LNI-LNII, and the counted value is the character clock signal CCLK. From G, it is output to the outside of the controller 7.

In addition, the 8-bit parallel character code signal CC is
As shown in FIG. 6, the original character code signal C
The contents of the display control code signal DP, which includes CI, CC2, CC3 and a display control code signal DP mixed in advance between these character code signals CCI, CC2, CC3, are shown in FIG. 3, for example. As in the letter B, the horizontal magnification signal MH, the vertical magnification signal MV, and furthermore - the clear signal LCC.
LR, selection signal MPX, etc.In addition, the display control code signal may be mixed into the character code signal by making it with punch tape, for example, and inputting it into the controller 7 at high speed0 Furthermore, the controller of the CRT (1) 7 is a display control code signal DP) and a corresponding timing signal GP, as shown in FIG.
0 (lυ in the center of Fig. 1 is a character code suppression circuit, and as shown in Fig. 6, this suppression circuit inputs the character code signal CC and displays when the timing signal GPA is present. The control code signal DP is replaced with a blank code and a character code signal cc' is output.

A3 is the first AND gate, and this gate has two timing signals G P A r L ? are input, respectively, and a timing signal t// is output (see Fig. 6).

Oy is a first latch circuit, which receives the character code signal CC and holds and outputs the display control code signal DP using the timing signal tr as shown in FIG.

04) is the second latch circuit, which receives the display control code signal DP.
is input, and each of the contents of the display control code signal DP is held and output as shown in FIG. 6 at the timing signal t6. That is, a horizontal magnification signal MH1, a vertical magnification signal MY, and a clear signal LCCLR selection signal MPX are output, respectively.

The α group is an AND gate, and this gate is a clock pulse D
OTCK and the second timing signal T7 are respectively input, and a clock signal t7'' is outputted as shown in FIG.

Oe is a counter for horizontal magnification; this counter inputs the clock signal t,'' as well as the horizontal magnification signal MH, and thins out the clock signal t7'' according to the content of the magnification signal MH. and outputs a load signal t:. For example, when double character enlargement is performed as shown in FIG. 3, an xl-code signal t7 is output for every two self-check signals t7'' as shown in FIG.

a7) is also an AND gate, and this gate receives the load signal t?
. , and a timing signal t7, and output timing signals t,' for loading to the parallel converter 5 as shown in FIG.

〇The barrel is a counter for horizontal magnification, and this counter inputs the clock pulse DOTCK as well as the horizontal magnification signal MH, thins out the clock pulse DOTCK according to the content of this magnification signal MH, and prohibits Outputs signal INH. For example, as shown in Fig. 3, when enlarging the clock by 2 times, as shown in Fig. 7, the clock pulse DO
One inhibition signal INH is output for every two TCKs to the parallel converter 5t. This inhibition signal INH is the same as the clock pulse DOTCK input to the parallel converter 5.
used for thinning out. As a result, the juxtaposed transducer 5
The clock pulses DO and TCK' within are thinned out and become as shown in FIG.

翰 is the display character's line MPX when enlarged vertically.
If = 1, line counter in controller 7 (not shown)
This counter inputs the horizontal retrace signal HRT for CRT (1) and the vertical magnification signal MV, and counts up every time HRT inputs the number of values MY. It is something to do. As shown in Figure G.

For example, when displaying characters are enlarged twice in the vertical direction as shown in FIG. 3, the count is increased every time HRT is input twice. That is, the same display is performed on the CRT (11) every two scanning lines, and the display is enlarged twice in the vertical direction.

The wire is a multiplexer, and this multiplexer is always
The 4-bit parallel line count signal LC from the 7 controllers of the CRT (1) is input, and this is sent to the character generator 4 as the 4-bit parallel line count signal Lσ' from the line count signal LC'. is input and outputted to the character generator 4 as a line count signal LC'.

0υ is a reset pulse generator.

If the 0I line counter is left alone, it will only count up based on the MV value and the IRT input.
A pulse for resetting this to 0 at an appropriate timing is obtained by this reset pulse generator.

As shown in FIG. 8, the line count signal L from the controller 7
C is O, that is, the scanning line is at the LNO position in 1x mode, and GPA-t = 1 (in this case, a special control code for specifying the vertical magnification is output) ) and the reset pulse alp is generated under the condition of LCCLR=1.

As mentioned in the storage of display data memory, this reset pulse is used to set LCCLR to 1 in the first special control code of the memory area with the same vertical magnification (excluding 1x). As a result, the output of the line counter 19 becomes a line count signal LC'' in which the count of the horizontal retrace signal HRT is thinned out.
For example, the upper line number LNO' and the lower line number L are input to the character generator 4 through
NI' means repeating the same dot pattern.

9. By changing the contents of the display control code signal DP in FIG. 6, for example, among the 8-bit parallel data,
- It goes without saying that the blank spaces can be used to perform various controls such as color control, brightness control, or reduction of displayed characters.

The display control method of the present invention as described above mixes a display control code into a display signal, processes the display signal with the display control signal, and controls the display device. Because it is characterized by the fact that
When applied to a display device, it is possible to enlarge a part or all of the characters on the display screen and control the color.
By using the RT controller (and this character generator), you can enlarge characters, control colors, etc. by simply adding a few external circuits.

Especially when using one character generator,
In other cases (compared to this), there is an advantage that the display can be enlarged arbitrarily by adding a simple circuit.Furthermore, since the horizontal magnification and vertical magnification can be set individually, It has the advantage of being able to set the magnification for each character and vertically for each line.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. FIG. 3 is an explanatory diagram for explaining FIG. Fifth. 6th. 7th. FIG. 8 is a time chart explaining FIG. 1, and FIG. 9 is an explanatory diagram explaining FIG. 1. 1: CRT 2: Pulse generator 3: Counter 4: Character generator (character generator) 5: Kamaishi converter 7: Controller of CRT (1) CC1
CC': Character code signal LC, LC', LC'Ni line count signal DP = Display control code signal

Claims (1)

[Claims] A display device that displays characters, figures, etc. has a display controller that can control the attributes of characters that are left out, and there is a time series between unit character code signals output to the character code output bus of the display controller. After sending out a control code signal in such a manner as to be read by a person, the display state corresponding to the character code signal following this control code signal is controlled by the control code signal extracted from the bus. A display control method for a display device.