JPS5889841A - Manufacture of semiconductor device - Google Patents
Manufacture of semiconductor deviceInfo
- Publication number
- JPS5889841A JPS5889841A JP56188101A JP18810181A JPS5889841A JP S5889841 A JPS5889841 A JP S5889841A JP 56188101 A JP56188101 A JP 56188101A JP 18810181 A JP18810181 A JP 18810181A JP S5889841 A JPS5889841 A JP S5889841A
- Authority
- JP
- Japan
- Prior art keywords
- scribing line
- aluminum
- layer
- insulating film
- section
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
- H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Dicing (AREA)
Abstract
Description
【発明の詳細な説明】
本発明は半導体装置の製造方法に係り、特に半導体集積
回路装置のスクライプ線構造に関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a semiconductor device, and particularly to a scribe line structure of a semiconductor integrated circuit device.
一般に半導体集積回路装置は半纏体ウェハーより個々の
ペレットに分離して製造される。従来、この工程はダイ
ヤモンドポイントより行われていたが、最近はグイシン
グンーによるスクライプ方法が一般になってきている。Semiconductor integrated circuit devices are generally manufactured by separating a semi-integrated wafer into individual pellets. Traditionally, this process was performed using a diamond point, but recently the scribing method using a guissing gun has become common.
更に自動化が進みフルオートダイシングソーが開発され
つつある。ところで、−従来の製造方法において、ダイ
シングンーによるスクライプ時にスクライブ線上にアル
ミニウムがあるとこのアルミニウムがめくれ巻がっ九9
、ヒゲ状になり、ペレッタイズの歩留り9組立歩留りの
低下をきたす。このためスクライブ線はアルミニウム以
外の構造が必要である。しかしながら、このアルミニウ
ムを酸化アルミニウム(Am!*Os’)にするとベレ
ッタイズ時にクラックが一生し信頼性上に重要な問題が
発生した。。Further automation is progressing, and fully automatic dicing saws are being developed. By the way, in the conventional manufacturing method, if there is aluminum on the scribe line during scribing by dicing, the aluminum will curl up.
, resulting in a whisker-like appearance and a decrease in pelletizing yield and assembly yield. For this reason, the scribe line requires a structure other than aluminum. However, when aluminum oxide (Am!*Os') was used instead of this aluminum, cracks persisted during pelletizing, causing a serious problem in terms of reliability. .
本発明は、このような従来のベレッタイズ時に生ずる間
罵を解決した、フルオートダイシングソーに適した半導
体集積回路装置の411にスクライプ線構造を提供せし
めるものである。The present invention provides a scribe line structure for a semiconductor integrated circuit device 411 suitable for a fully automatic dicing saw, which solves the problems that occur during conventional pelletizing.
本発明のIIIIIkは、半導体基板の↓表面にスクラ
イブ線を形成する前に、このスクライブ線にあた。IIIk of the present invention is applied to the scribe line before forming the scribe line on the ↓ surface of the semiconductor substrate.
る部分の絶縁膜を除去して一段差をつける工程を含む半
導体装置の製造方法にある。そして、このスクライブ線
にあたる部分を含む基板の表面にアルiニラ五線を形成
し、その後このアルミニウムを酸化して酸化アルミニウ
ム膜を形成することが望ましい。The method of manufacturing a semiconductor device includes the step of removing an insulating film from a portion where the semiconductor device is removed to create a step difference. Then, it is desirable to form an aluminum leek stave on the surface of the substrate including the portion corresponding to the scribe line, and then oxidize the aluminum to form an aluminum oxide film.
本発明によれば、スクライプ線にそれ以外の部分と段差
をつける仁とにより、クラックは半導体集積回路の内部
にオで及ばずスクライプ線の段のところで阻止すること
が出来る。さらに、フルオートダイシングソーのスクラ
イブ線認識線ウェハー上部より光をあてて行表うので、
その反射率の差により認識精度、速度が決ま−る。し九
がりぞ、スクライプ線材質が均一であることが必簀であ
るが、上記のように酸化アルζニウム展(AjmOs)
を使えば均一な膜質が得られ、フルオートダイシングソ
ーの認識部が充分認識する。According to the present invention, cracks can be stopped at the step of the scribe line without extending into the interior of the semiconductor integrated circuit by providing a step difference between the scribe line and the other portions. Furthermore, since the scribe line recognition line of the fully automatic dicing saw is illuminated from the top of the wafer,
Recognition accuracy and speed are determined by the difference in reflectance. In this case, it is essential that the scribe line material be uniform, but as mentioned above, aluminum oxide (AjmOs)
If you use , you will get a uniform film quality and the recognition part of the fully automatic dicing saw will recognize it well.
以下、本発明の実施例によって詳述する。Hereinafter, the present invention will be explained in detail using examples.
第1図、第2図社本発明の実施例を示す半導体装置の断
面図である。第1IIにおいてシリコン半導体基板lに
集積回路の製造工種で−られる拡散。FIGS. 1 and 2 are cross-sectional views of a semiconductor device showing an embodiment of the present invention. Diffusion is carried out in a silicon semiconductor substrate 1 during the manufacturing process of an integrated circuit.
酸化後、写真食刻法に!リスクライプlIi!にあたる
一部分の絶縁膜2を除去する。この部分は次の陽極クラ
イブ線との段差をつける丸め行う。次に全面にアルミニ
ウム蒸着後、陽極酸化により配線形式及びスクライプ線
部分を酸化アルミニウム(人60s)にする。第2図は
他の実施例である。これは陽極酸化による一層配一の上
に層間絶縁膜4.二層アルミニウム5.保験膜6を施し
九構造を示す。この時二層アルミニウム、保護膜の工、
チング、PR剥離等で酸化アルi=りム(人jsos>
がおかされないように、層間絶縁1!4は残、しておく
。After oxidation, use photo-etching! Risk write lIIi! A portion of the insulating film 2 is removed. This part is rounded to create a difference in level from the next anode Clive wire. Next, after aluminum is vapor-deposited on the entire surface, the wiring type and the scribe line portion are changed to aluminum oxide (60 seconds) by anodizing. FIG. 2 shows another embodiment. This is an interlayer insulating film 4 on top of a single layer of anodic oxidation. Double layer aluminum 5. A protective film 6 was applied to show the structure. At this time, double layer aluminum, protective film processing,
Aluminum oxide rim (human jsos>
The interlayer insulation 1 to 4 is left in place to prevent damage.
以上本発明によればフルオートダイシングソーによるメ
クラ4プが容易に実施でき高歩留りが得られる。As described above, according to the present invention, blanking can be easily performed using a fully automatic dicing saw, and a high yield can be obtained.
第1図及び第2図は各々本発明の半導体集積回路の実施
例を示す断面図である。FIGS. 1 and 2 are cross-sectional views showing embodiments of the semiconductor integrated circuit of the present invention.
Claims (1)
スクライブ線を形成する前に該スクライブ線にあたる部
分の絶縁膜を除去して段差をつける工程を含むことを特
徴とする半導体装置や製造方法・A semiconductor device and manufacturing method characterized in that the semiconductor device manufacturing method includes a step of removing an insulating film in a portion corresponding to the scribe line to form a step before forming a scribe line on the main surface of a semiconductor substrate.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56188101A JPS5889841A (en) | 1981-11-24 | 1981-11-24 | Manufacture of semiconductor device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP56188101A JPS5889841A (en) | 1981-11-24 | 1981-11-24 | Manufacture of semiconductor device |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5889841A true JPS5889841A (en) | 1983-05-28 |
Family
ID=16217713
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP56188101A Pending JPS5889841A (en) | 1981-11-24 | 1981-11-24 | Manufacture of semiconductor device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5889841A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7358155B2 (en) * | 2005-01-25 | 2008-04-15 | Samsung Electronics Co., Ltd. | Scribe-line structures and methods of forming the same |
-
1981
- 1981-11-24 JP JP56188101A patent/JPS5889841A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US7358155B2 (en) * | 2005-01-25 | 2008-04-15 | Samsung Electronics Co., Ltd. | Scribe-line structures and methods of forming the same |
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