JPS5886777A - Setting method for threshold voltage of mnos memory cell - Google Patents

Setting method for threshold voltage of mnos memory cell

Info

Publication number
JPS5886777A
JPS5886777A JP18482981A JP18482981A JPS5886777A JP S5886777 A JPS5886777 A JP S5886777A JP 18482981 A JP18482981 A JP 18482981A JP 18482981 A JP18482981 A JP 18482981A JP S5886777 A JPS5886777 A JP S5886777A
Authority
JP
Japan
Prior art keywords
voltage
transistor
vg
gate
vd
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18482981A
Inventor
Kazunari Hayafuchi
Toshiaki Tanaka
Original Assignee
Citizen Watch Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Citizen Watch Co Ltd filed Critical Citizen Watch Co Ltd
Priority to JP18482981A priority Critical patent/JPS5886777A/en
Publication of JPS5886777A publication Critical patent/JPS5886777A/en
Application status is Pending legal-status Critical

Links

Classifications

    • HELECTRICITY
    • H01BASIC ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES; ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H01L29/00Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/792Field effect transistors with field effect produced by an insulated gate with charge trapping gate insulator, e.g. MNOS-memory transistors

Abstract

PURPOSE:To readily obtain an MNOS transistor having different threshold voltages by applying a voltage to the substrate and the gate of an MNOS memory cell, and then applying a voltage between the gate terminal of the cell and a source or drain terminal, thereby deciding the threshold value of the cell. CONSTITUTION:A high voltage is applied to the gate terminal 2 of an MNOS transistor to write, and an electrode is collected to a trap center. Then, a voltage VS or VD to be applied to a source or drain terminal 4 or 3 is varied while maintaining the voltage VG of the terminal 2 constant, the difference¦VG-VD¦ from the gate voltage VG is set to V1, V2, V3, V4, thereby rewriting. In this manner, threshold voltages Vth1-Vth4 of the transistor corresponding to V1- V4 of the voltage difference between the VG and the VD are obtained, thereby selecting the transistor having the prescribed threshold value. In other words, the width of a depletion layer is variably controlled to perform the writing or rewriting, and the transistor having different threshold value is formed.
JP18482981A 1981-11-18 1981-11-18 Setting method for threshold voltage of mnos memory cell Pending JPS5886777A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18482981A JPS5886777A (en) 1981-11-18 1981-11-18 Setting method for threshold voltage of mnos memory cell

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18482981A JPS5886777A (en) 1981-11-18 1981-11-18 Setting method for threshold voltage of mnos memory cell

Publications (1)

Publication Number Publication Date
JPS5886777A true JPS5886777A (en) 1983-05-24

Family

ID=16160021

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18482981A Pending JPS5886777A (en) 1981-11-18 1981-11-18 Setting method for threshold voltage of mnos memory cell

Country Status (1)

Country Link
JP (1) JPS5886777A (en)

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0240198A (en) * 1988-07-29 1990-02-08 Mitsubishi Electric Corp Nonvolatile memory
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US5268870A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
US5293560A (en) * 1988-06-08 1994-03-08 Eliyahou Harari Multi-state flash EEPROM system using incremental programing and erasing methods
US5719808A (en) * 1989-04-13 1998-02-17 Sandisk Corporation Flash EEPROM system
US5963480A (en) * 1988-06-08 1999-10-05 Harari; Eliyahou Highly compact EPROM and flash EEPROM devices
US6462992B2 (en) 1989-04-13 2002-10-08 Sandisk Corporation Flash EEprom system
USRE41019E1 (en) 1993-09-21 2009-12-01 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
US8040727B1 (en) 1989-04-13 2011-10-18 Sandisk Corporation Flash EEprom system with overhead data stored in user data sectors

Cited By (29)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5909390A (en) * 1988-06-08 1999-06-01 Harari; Eliyahou Techniques of programming and erasing an array of multi-state flash EEPROM cells including comparing the states of the cells to desired values
US5043940A (en) * 1988-06-08 1991-08-27 Eliyahou Harari Flash EEPROM memory systems having multistate storage cells
US5268870A (en) * 1988-06-08 1993-12-07 Eliyahou Harari Flash EEPROM system and intelligent programming and erasing methods therefor
US5293560A (en) * 1988-06-08 1994-03-08 Eliyahou Harari Multi-state flash EEPROM system using incremental programing and erasing methods
US5434825A (en) * 1988-06-08 1995-07-18 Harari; Eliyahou Flash EEPROM system cell array with more than two storage states per memory cell
US5544118A (en) * 1988-06-08 1996-08-06 Harari; Eliyahou Flash EEPROM system cell array with defect management including an error correction scheme
US5568439A (en) * 1988-06-08 1996-10-22 Harari; Eliyahou Flash EEPROM system which maintains individual memory block cycle counts
US5583812A (en) * 1988-06-08 1996-12-10 Harari; Eliyahou Flash EEPROM system cell array with more than two storage states per memory cell
US5642312A (en) * 1988-06-08 1997-06-24 Harari; Eliyahou Flash EEPROM system cell array with more than two storage states per memory cell
US5712819A (en) * 1988-06-08 1998-01-27 Harari; Eliyahou Flash EEPROM system with storage of sector characteristic information within the sector
US5963480A (en) * 1988-06-08 1999-10-05 Harari; Eliyahou Highly compact EPROM and flash EEPROM devices
US5835415A (en) * 1988-06-08 1998-11-10 Harari; Eliyahou Flash EEPROM memory systems and methods of using them
US5862081A (en) * 1988-06-08 1999-01-19 Harari; Eliyahou Multi-state flash EEPROM system with defect management including an error correction scheme
JPH0240198A (en) * 1988-07-29 1990-02-08 Mitsubishi Electric Corp Nonvolatile memory
US5719808A (en) * 1989-04-13 1998-02-17 Sandisk Corporation Flash EEPROM system
US5999446A (en) * 1989-04-13 1999-12-07 Sandisk Corporation Multi-state flash EEprom system with selective multi-sector erase
US6462992B2 (en) 1989-04-13 2002-10-08 Sandisk Corporation Flash EEprom system
US7460399B1 (en) 1989-04-13 2008-12-02 Sandisk Corporation Flash EEprom system
US8040727B1 (en) 1989-04-13 2011-10-18 Sandisk Corporation Flash EEprom system with overhead data stored in user data sectors
USRE41021E1 (en) 1993-09-21 2009-12-01 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41020E1 (en) 1993-09-21 2009-12-01 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41019E1 (en) 1993-09-21 2009-12-01 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41456E1 (en) 1993-09-21 2010-07-27 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41468E1 (en) 1993-09-21 2010-08-03 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41485E1 (en) 1993-09-21 2010-08-10 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41950E1 (en) 1993-09-21 2010-11-23 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41969E1 (en) 1993-09-21 2010-11-30 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE42120E1 (en) 1993-09-21 2011-02-08 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit
USRE41244E1 (en) 1993-09-21 2010-04-20 Kabushiki Kaisha Toshiba Multi-state EEPROM having write-verify control circuit

Similar Documents

Publication Publication Date Title
EP0015675B1 (en) Semiconductor memory device
EP0051158B1 (en) Electrically alterable double dense memory
CN1922737B (en) Multi-state memory cell with asymmetric charge trapping
JP3204602B2 (en) Nonvolatile semiconductor memory device
US5659504A (en) Method and apparatus for hot carrier injection
US3955098A (en) Switching circuit having floating gate mis load transistors
US4661833A (en) Electrically erasable and programmable read only memory
EP0030856B1 (en) Charge-pumping semiconductor memory cell comprising a charge-storage region and memory device using such a cell
US4331968A (en) Three layer floating gate memory transistor with erase gate over field oxide region
US5253196A (en) MOS analog memory with injection capacitors
US4425631A (en) Non-volatile programmable integrated semiconductor memory cell
EP0040701B1 (en) Fet cell usable in storage or switching devices
US5777361A (en) Single gate nonvolatile memory cell and method for accessing the same
KR0184024B1 (en) Semiconductor device having a multi-layer channel structure
TW328654B (en) The electrically programmable memory cell array and its manufacturing method
EP0042964A1 (en) Memory matrix using one-transistor floating gate MOS cells
TW540055B (en) Usage of word voltage assistance in twin MONOS cell during program and erase
US4532535A (en) Electrically reprogrammable non volatile memory cell floating gate EEPROM with tunneling to substrate region
TW434897B (en) Ferroelectric field effect transistor and method of making same
TW360980B (en) Single transistor EEPROM memory device
JPS61150366A (en) Mis type memory cell
TW363276B (en) Thin-film semiconductor device, thin-film transistor and method for fabricating the same
TW284884B (en) Method for programming a nonvolatile memory
EP1209747A3 (en) Semiconductor memory element
GB2041645A (en) Substrate coupled floating gate memory cell and method of programming