JPS5868131A - Method for controlling clock supply to computer system - Google Patents

Method for controlling clock supply to computer system

Info

Publication number
JPS5868131A
JPS5868131A JP56165812A JP16581281A JPS5868131A JP S5868131 A JPS5868131 A JP S5868131A JP 56165812 A JP56165812 A JP 56165812A JP 16581281 A JP16581281 A JP 16581281A JP S5868131 A JPS5868131 A JP S5868131A
Authority
JP
Japan
Prior art keywords
clock
computer system
mclk
supplied
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56165812A
Inventor
Koichi Takemaru
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56165812A priority Critical patent/JPS5868131A/en
Publication of JPS5868131A publication Critical patent/JPS5868131A/en
Application status is Pending legal-status Critical

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING; COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 – G06F13/00 and G06F21/00
    • G06F1/04Generating or distributing clock signals or signals derived directly therefrom

Abstract

PURPOSE:To shorten the clock interruption processing time of each computer system by externally supplying computer systems with a clock frequency-divided according to a control period. CONSTITUTION:A master clock signal MCLK from a master clock signal generator 2 is supplied to computer systems 1a, 1b, and 1c through clock controllers 4a, 4b, and 4c. The clock controller 4a (4b and 4c) has its RS flip-flop 5 set by a start command signal STRT from an external sequencer 3 and reset by a stop command signal STP to decide on whether the MCLK is supplied to the computer system or not. When the flip-flop 5 is set, the MCLK is frequency- divided by a frequency divider 7, and the resulting signal is supplied as the control period synchronizing clock to each computer system. Thus, interruption judgement processing time is shortened.
JP56165812A 1981-10-19 1981-10-19 Method for controlling clock supply to computer system Pending JPS5868131A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56165812A JPS5868131A (en) 1981-10-19 1981-10-19 Method for controlling clock supply to computer system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56165812A JPS5868131A (en) 1981-10-19 1981-10-19 Method for controlling clock supply to computer system

Publications (1)

Publication Number Publication Date
JPS5868131A true JPS5868131A (en) 1983-04-22

Family

ID=15819458

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56165812A Pending JPS5868131A (en) 1981-10-19 1981-10-19 Method for controlling clock supply to computer system

Country Status (1)

Country Link
JP (1) JPS5868131A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63163390A (en) * 1986-12-25 1988-07-06 Yokogawa Electric Corp Crtc controller with graphic function
WO1994010801A1 (en) * 1992-11-05 1994-05-11 Ampex Systems Corporation Input clock presence detector for a digital video input signal
US6990598B2 (en) * 2001-03-21 2006-01-24 Gallitzin Allegheny Llc Low power reconfigurable systems and methods

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63163390A (en) * 1986-12-25 1988-07-06 Yokogawa Electric Corp Crtc controller with graphic function
WO1994010801A1 (en) * 1992-11-05 1994-05-11 Ampex Systems Corporation Input clock presence detector for a digital video input signal
US6990598B2 (en) * 2001-03-21 2006-01-24 Gallitzin Allegheny Llc Low power reconfigurable systems and methods

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