JPS5866439A - Waveform coding system - Google Patents

Abstract

PURPOSE:To perform a reproduction of waveform for an output signal without level information, by comparing the 1-clock preceding output signal with the upper and lower limit levels and giving an adaptive compression to the output signal if it exceeds both levels. CONSTITUTION:A data compressing circuit 13a compresses a PCM signal based on the signal delivered from an equalizing width storage circuit 20a. If no numeral is available at first to be stored in the circuit 20a, the circuit 13a delivers level 0. This output signal is fed to a level change deciding circuit 18a. On the other hand, the circuit 18a delivers -1 to an arithmetic circuit 19 when an input signal A to the circuit 18a from a differential data compressing circuit is less than the lower set value ''5'' and as long as both the upper and lower set values ''11'' and ''5'', for example, are fed to the circuit 18a. The circuit 18a delivers +1 when the signal A exceeds the value ''11'' and then delivers 0 when the signal A is within ''11''-''5''.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention is based on the PCM method, especially for analyzing and analyzing audio in the audible band.
Adaptive Pul5e C used for synthesis
ode Modulation (APCM) and Adapt, ive Different t la
l Regarding improvements to the PCM (ADPCM) system.

The PCM method was developed as a method for converting analog information into digital signals for transmission and processing.With the development of semiconductor technology, especially digital LSIs suitable for high-speed processing, the PCM method has been developed as a method for converting analog information into digital signals and transmitting and processing them. In addition, it has become widely popular as a transmission and processing method in the audio domain, taking advantage of its ability to restore information through playback processing so that deterioration in information quality during the process can be ignored, a function not found in analog processing.

As shown in Figure 1(a), PCM samples the target input waveform at a certain frequency and quantizes it using, for example, an 8-bit binary code, but depending on the allowable quantization noise, the lower bit The signal is compressed by truncating and widening the quantization width.

FIG. 3 shows a block diagram of a conventional waveform encoding method APCM. II is an A/D conversion circuit, 12 is a clock signal generation circuit, 13 is a data compression circuit, and +4a is an adaptive level setting circuit. The input waveform given to the A/D conversion circuit 11 is sampled and held by the A/D conversion circuit 11 according to the reference clock of the clock signal generation circuit 12, and once outputted to the A/D conversion circuit 11.
tion (PAM) signal, each pulse signal is converted into a binary representation (it quantized) of a preset 8-bit code according to the peak value of the pulse signal as shown in Figure 1 (a).
) as shown in the data compression circuit 1 as an 8-bit PCM signal.
3 and the adaptive level setting circuit 14a. The adaptive level setting circuit 14a detects the highest valid data bit of the input pulse signal, calculates the lowest valid data bit signal according to a preset number of bits, and sends it to the data compression circuit 13. In this example, the number of effective bits set is 4, so when the highest valid data bit is 27 as shown in Figure 1(b), the lowest valid data bit is 2'', which is referred to as level 4.Hereinafter, as shown in Figure 1(C). 2', the lowest bit of valid data is 2J, which is called level 3. Below, Figure 1 (d) to (f)
The effective data shown in FIG. 1(f) is shifted by l bits as shown in FIG. 1(f), resulting in an allocation called level 0. Even if the adaptive level setting circuit 14a detects 22 to 2'' as the highest focus of valid data, the lowest bit of valid data is 2'.
Send to 3. In this way, the data compression circuit 13 receives the lowest valid data bit signal corresponding to the highest pitch of valid data for each pulse signal, and according to this signal, data below the lowest bit of valid data is not output as an invalid information code. Therefore, the 8-beat PCM shown in FIG. 1(a) always becomes an APCM signal compressed into one of the 4-bit codes shown in FIG. 1(b) to (f) at the time of output in FIG. 3.

However, this APCM signal requires level information for determining the level of each signal. This level information is output from the adaptive level setting circuit 14a in FIG.
Normally, if this level information is added to each output signal, in the example shown in FIG. 1, 3 bits will be used separately as level information, and outputting level information every time will reduce the meaning of data compression. Therefore, this level information is inserted at regular intervals at the beginning of the APCM signal or in the middle of the data, and the interval between one level information and the next level information is treated as a constant level. Figure 4 shows A of the conventional waveform encoding method.
A block diagram of DPCM is shown.

The A/D conversion circuit II and the clock signal generation circuit 12 are common to FIG. 3, and +4b is an adaptive level setting circuit;
15 is a difference data compression circuit, 16 is a difference data creation circuit, 1
7 is a data holding circuit. In this case, the A/D conversion circuit 11 converts the PCM signal into a PCM signal, and then the difference data creation circuit 16 generates a signal inputted by the data holding circuit 17 with a delay of one clock signal, that is, a PCM signal that precedes the PCM signal by l clock signals. A difference data signal is obtained. As shown in FIG. 2(a), the difference data signal consists of a polarity code indicating positive or negative polarity and an 8-bit code indicating the absolute value. The fear data signal is sent to the adaptive level setting circuit 14b and the difference data compression circuit I5, and the adaptive level setting circuit 1 in FIG.
In accordance with the preset effective number of beats as in case 4, for example, in this case, the second
The lowest beat signal of valid data is discriminated between levels 5 and 0 as shown in FIGS.
Figure 2 (b) with a polarity code adapted to the data of the CM signal.
) to <g> as compressed difference signals. The output signal from this difference data compression circuit 15 is also
30) As with the output signal, it is necessary to add level information that is the output from the adaptive level setting circuit 14b, and if you perform operations such as inserting level information every time the output signal level increases, unnecessary This method has the disadvantage that data management is complicated, such as requiring a control circuit and time.

The present invention seeks to provide a means to eliminate this drawback in the prior art. Therefore, the present invention outputs the quantization width of a PCM signal obtained by sampling and quantizing an input waveform or a DifferentialPcM signal based on its adjacent difference signal as an adaptively compressed PCM that is adapted to the signal or an adaptively compressed DPCM signal that is accompanied by a polarity signal. In a waveform encoding method, a means is provided for comparing an output signal preceding one clock with preset upper and lower limits, and when the preceding output signal exceeds the upper limit, the quantization width of the output signal is expanded and the lower limit is set. This is characterized in that the output signal is adaptively compressed by reducing the output signal when the output signal falls below the value.

An embodiment of the present invention will be described below with reference to the drawings. FIG. 5 shows a block diagram of a waveform encoding scheme in one implementation of the present invention. In FIG. 5, ζ11 is an A/D conversion circuit, 12 is a block signal generation circuit, and +32 is a data compression circuit, which are common to the conventional block diagram in FIG.
18a is a level change determination circuit, 19 is an arithmetic circuit, 20a
is a quantization width storage circuit.

The A/D conversion circuit 11, which is the same as the conventional one, outputs, for example, an 8-bit PCM in which a human waveform is sampled and sweetened in accordance with the basic clock signal from the block signal generation circuit 12. The data compression circuit 13 is a quantization width storage circuit 20a.
The PCM signal is compressed in accordance with the signal outputted by the compressed PCM signal, and outputted as, for example, a 4-bit compressed PCM signal. If there is no number to be initially stored in the quantization width storage circuit 20a, the data compression circuit 13 outputs level 0 as shown in FIG. 1(f). This output, No. 1, is input to the level change determination circuit 18a.

On the other hand, the level change determination circuit 182 has an upper setting value such as '
It is assumed that a lower setting value of "II", for example "5", is input.
When the human input signal A to 8b is less than the lower setting value "5", the level change determination circuit 18b outputs -1 and outputs it to the arithmetic circuit 19. Further, when the signal A exceeds the upper set value "11", +1 is output, and when the signal A is between 11 and 5', zero (0) is output.

FIG. 6 shows a block diagram of a waveform encoding system in another embodiment of the present invention. In FIG. 6, an A/D conversion path circuit 11, a lock signal generation circuit 12, and a difference data compression circuit 1.
5a, the difference data creation circuit 16, and the data holding circuit 17 are the same as those in the conventional block diagram shown in FIG. 1
8b is a level determination circuit, 19 is an arithmetic circuit, and 20b is a quantization width storage circuit. The block diagram in FIG. 6 is an example in which the present invention is applied to the ADPCM shown in FIG. It is similar to Here, the level change judgment circuit +8b and the difference data compression circuit 15
If the output signal B and the upper set value of 5" and the lower set value of 3" are manually input, then
When signal B exceeds 6", +1 is output, and when signal B is less than 3", output is -11, and when signal B is between 35 and 3", O output is output. Each arithmetic circuit 19 adds the value of the output signals A and B, that is, either the output +1.0 or -1 of the level change judgment circuit 18a, b according to the content of the immediately preceding adjacent output signal, to the output signal value just before the previous one. , outputs the calculation signal to the quantization width storage circuits 2Qa, b, and updates the stored numbers each time.Quantization width storage circuit 2
0a and b are the arithmetic circuit 19 using these numbers as sweetening width signals.
and data compression circuit 13a, difference data compression circuit 1
5a, and the data compression circuit 13a and the difference data compression circuit 15a follow this signal, for example, if O is input manually, level 0, and if 3 is input, level 3, as shown in FIGS. 1(b) to (f). Alternatively, compressed PCM or compressed DPCM signals at each level shown in FIGS. 2(b) to (g) are output.

The output ftj is sent to the level change determination circuits 18a and 18b, and serves as a reference for determining the quantization width level of the next output signal.

In this way, the level of ζ for the data compression circuit 13a is such that the 4-bit data approaches 11 to 5", and for the difference data compression circuit +52, the 3-bit data approaches 5 to 3" and becomes stable. Change determination circuit +88. b and the arithmetic circuit 19 operate to determine the level of the quantization width of the output signal of the data compression circuit 13aSS data compression circuit 15a according to the output signal before the first clock. Since the level can be determined by following the level change of the signal, the output signal does not have separate level information, and a waveform encoding method that can reproduce the waveform with less data can be obtained.

[Brief explanation of the drawing]

Figures 1 (a) to (f) are configuration diagrams of the waveform coding method (A P CM) signal (via) in the conventional and one embodiment of the present invention, and Figures 2 (a) to (g) are the configuration diagrams of the conventional and present invention. A focus configuration diagram of a waveform encoding method (ΔDP CM) signal in an embodiment of the invention, FIG. 3 is a block diagram of a conventional waveform encoding method (Al) CM), and FIG. 4 shows a conventional waveform A block diagram of the encoding method (APCM), FIG. 5 is a waveform encoding method (AP''CM) in one embodiment of the present invention.
FIG. 6 is a block diagram of a waveform coding method (AP CM) in another embodiment of the present invention. 11 is an A/D conversion circuit, 13 is a data compression circuit, 15 is a difference data compression circuit, 16 is a difference data creation circuit, 18a,
b is a level change determination circuit, and 20a and 20b are quantization width storage circuits. Fig. 1<b) Shi'\"Ishi40In] (C) Shi'her3 []=Ding=[](d)
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Claims (1)

[Claims] Pu1se obtained by sampling and quantizing human waveforms
DifferentialP by Code Modulation (PCM) signal or its adjacent difference signal
Upper and lower limit values preset for an output signal that is one clock ahead in a waveform encoding method that outputs the quantization width of a cM signal as an adaptively compressed PCM signal that adapts the quantization width to the size of the signal or as an adaptively compressed DPCM signal with a polarity signal. The waveform is characterized in that the quantization width of the output signal is expanded when the preceding output signal exceeds the upper limit value, and is reduced when the preceding output signal exceeds the lower limit value, so that the output signal is not adaptively compressed. Encoding method.