JPS58501981A - プログラム可能なマルチプレクサ - Google Patents
プログラム可能なマルチプレクサInfo
- Publication number
- JPS58501981A JPS58501981A JP83500147A JP50014783A JPS58501981A JP S58501981 A JPS58501981 A JP S58501981A JP 83500147 A JP83500147 A JP 83500147A JP 50014783 A JP50014783 A JP 50014783A JP S58501981 A JPS58501981 A JP S58501981A
- Authority
- JP
- Japan
- Prior art keywords
- multiplexer
- output
- signal
- programmable
- fixed
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/1733—Controllable logic circuits
- H03K19/1737—Controllable logic circuits using multiplexers
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K17/00—Electronic switching or gating, i.e. not by contact-making and –breaking
- H03K17/002—Switching arrangements with several input- or output terminals
- H03K17/005—Switching arrangements with several input- or output terminals with several inputs only
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04J—MULTIPLEX COMMUNICATION
- H04J3/00—Time-division multiplex systems
- H04J3/02—Details
- H04J3/04—Distributors combined with modulators or demodulators
- H04J3/047—Distributors with transistors or integrated circuits
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Computer Networks & Wireless Communication (AREA)
- Signal Processing (AREA)
- Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Mathematical Physics (AREA)
- Logic Circuits (AREA)
- Electronic Switches (AREA)
- Measurement Of Length, Angles, Or The Like Using Electric Or Magnetic Means (AREA)
- Length Measuring Devices With Unspecified Measuring Means (AREA)
- Arrangements For Transmission Of Measured Signals (AREA)
Applications Claiming Priority (3)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| US322462 | 1973-01-10 | ||
| US06/322,462 US4409683A (en) | 1981-11-18 | 1981-11-18 | Programmable multiplexer |
| PCT/US1982/001612 WO1983001880A1 (en) | 1981-11-18 | 1982-11-15 | Programmable multiplexer |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58501981A true JPS58501981A (ja) | 1983-11-17 |
Family
ID=23255012
Family Applications (2)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP83500147A Pending JPS58501981A (ja) | 1981-11-18 | 1982-11-15 | プログラム可能なマルチプレクサ |
| JP58500147A Pending JPH0552686B1 (https=) | 1981-11-18 | 1982-11-15 |
Family Applications After (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP58500147A Pending JPH0552686B1 (https=) | 1981-11-18 | 1982-11-15 |
Country Status (5)
| Country | Link |
|---|---|
| US (1) | US4409683A (https=) |
| EP (1) | EP0081917B1 (https=) |
| JP (2) | JPS58501981A (https=) |
| DE (1) | DE3271686D1 (https=) |
| WO (1) | WO1983001880A1 (https=) |
Families Citing this family (41)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US4512018A (en) * | 1983-03-08 | 1985-04-16 | Burroughs Corporation | Shifter circuit |
| GB8404480D0 (en) * | 1984-02-21 | 1984-03-28 | Int Computers Ltd | Microprogram control |
| US4599721A (en) * | 1984-04-02 | 1986-07-08 | Tektronix, Inc. | Programmable cross bar multiplexer |
| US4685106A (en) * | 1984-08-31 | 1987-08-04 | Sperry Corporation | High rate multiplexer |
| US4680759A (en) * | 1984-10-15 | 1987-07-14 | Sperry Corporation | Standard/proportional multiplexer |
| US4718063A (en) * | 1985-06-20 | 1988-01-05 | The United States Of America As Represented By The Secretary Of The Navy | Optoelectronic integrated circuit multiplex |
| NO167250C (no) * | 1985-07-16 | 1991-10-16 | Siemens Ag | Kanalfordeler for digitalsignaler. |
| US4758747A (en) * | 1986-05-30 | 1988-07-19 | Advanced Micro Devices, Inc. | Programmable logic device with buried registers selectively multiplexed with output registers to ports, and preload circuitry therefor |
| US4752895A (en) * | 1985-12-31 | 1988-06-21 | The Boeing Company | Ultrasonic inspection system apparatus and method using multiple receiving transducers |
| US4799177A (en) * | 1985-12-31 | 1989-01-17 | The Boeing Company | Ultrasonic instrumentation for examination of variable-thickness objects |
| US4721868A (en) * | 1986-09-23 | 1988-01-26 | Advanced Micro Devices, Inc. | IC input circuitry programmable for realizing multiple functions from a single input |
| US4897836A (en) * | 1987-10-20 | 1990-01-30 | Gazelle Microcircuits, Inc. | Programmable connection path circuit |
| DE3889214T2 (de) * | 1988-01-22 | 1994-11-17 | Ibm | Protokoll und Vorrichtung für selektives Abtasten von verschiedenen Leitungen, die mit einem Übertragungsgerät verbunden sind. |
| US5062105A (en) * | 1990-01-02 | 1991-10-29 | At&T Bell Laboratories | Programmable multiplexing techniques for mapping a capacity domain into a time domain within a frame |
| US5065396A (en) * | 1990-01-02 | 1991-11-12 | At&T Bell Laboratories | Inverse multiplexer and demultiplexer techniques |
| US5055712A (en) * | 1990-04-05 | 1991-10-08 | National Semiconductor Corp. | Register file with programmable control, decode and/or data manipulation |
| US5198705A (en) * | 1990-05-11 | 1993-03-30 | Actel Corporation | Logic module with configurable combinational and sequential blocks |
| US5055718A (en) * | 1990-05-11 | 1991-10-08 | Actel Corporation | Logic module with configurable combinational and sequential blocks |
| US5483539A (en) * | 1990-11-07 | 1996-01-09 | Loral Aerospace Corp. | Programmable PCM/TDM demultiplexer |
| US6759870B2 (en) | 1991-09-03 | 2004-07-06 | Altera Corporation | Programmable logic array integrated circuits |
| US5550782A (en) * | 1991-09-03 | 1996-08-27 | Altera Corporation | Programmable logic array integrated circuits |
| US20020130681A1 (en) | 1991-09-03 | 2002-09-19 | Cliff Richard G. | Programmable logic array integrated circuits |
| US5260610A (en) * | 1991-09-03 | 1993-11-09 | Altera Corporation | Programmable logic element interconnections for programmable logic array integrated circuits |
| US5410186A (en) * | 1991-12-19 | 1995-04-25 | International Business Machines Company | Programmable digital to analog converter |
| US5483178A (en) * | 1993-03-29 | 1996-01-09 | Altera Corporation | Programmable logic device with logic block outputs coupled to adjacent logic block output multiplexers |
| US5635857A (en) * | 1994-12-08 | 1997-06-03 | Unisys Corporation | IC chip using a common multiplexor logic element for performing logic operations |
| US6049223A (en) * | 1995-03-22 | 2000-04-11 | Altera Corporation | Programmable logic array integrated circuit with general-purpose memory configurable as a random access or FIFO memory |
| US5977791A (en) | 1996-04-15 | 1999-11-02 | Altera Corporation | Embedded memory block with FIFO mode for programmable logic device |
| US5959466A (en) | 1997-01-31 | 1999-09-28 | Actel Corporation | Field programmable gate array with mask programmed input and output buffers |
| US5936426A (en) | 1997-02-03 | 1999-08-10 | Actel Corporation | Logic function module for field programmable array |
| US5923675A (en) * | 1997-02-20 | 1999-07-13 | Teradyne, Inc. | Semiconductor tester for testing devices with embedded memory |
| US6020760A (en) | 1997-07-16 | 2000-02-01 | Altera Corporation | I/O buffer circuit with pin multiplexing |
| US6034857A (en) * | 1997-07-16 | 2000-03-07 | Altera Corporation | Input/output buffer with overcurrent protection circuit |
| US6011744A (en) * | 1997-07-16 | 2000-01-04 | Altera Corporation | Programmable logic device with multi-port memory |
| US6467017B1 (en) | 1998-06-23 | 2002-10-15 | Altera Corporation | Programmable logic device having embedded dual-port random access memory configurable as single-port memory |
| US6262933B1 (en) | 1999-01-29 | 2001-07-17 | Altera Corporation | High speed programmable address decoder |
| US6486702B1 (en) | 1999-07-02 | 2002-11-26 | Altera Corporation | Embedded memory blocks for programmable logic |
| US6720796B1 (en) | 2001-05-06 | 2004-04-13 | Altera Corporation | Multiple size memories in a programmable logic device |
| US7111110B1 (en) | 2002-12-10 | 2006-09-19 | Altera Corporation | Versatile RAM for programmable logic device |
| WO2007138384A1 (en) * | 2006-05-29 | 2007-12-06 | Freescale Semiconductor, Inc. | Method and device for switching data |
| US8130044B2 (en) * | 2008-06-19 | 2012-03-06 | Altera Corporation | Phase-locked loop circuitry with multiple voltage-controlled oscillators |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5075339A (https=) * | 1973-11-05 | 1975-06-20 | ||
| US4121055A (en) * | 1977-06-06 | 1978-10-17 | Microcom Corporation | Integrated programmable commutation and signal conditioning circuit |
| JPS5472949A (en) * | 1977-11-24 | 1979-06-11 | Hitachi Ltd | Multiplexer circuit |
Family Cites Families (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| US3992703A (en) * | 1974-10-09 | 1976-11-16 | Rockwell International Corporation | Memory output circuit |
| US3979561A (en) * | 1975-05-06 | 1976-09-07 | The United States Of America As Represented By The Secretary Of The Navy | Level-code encoded multiplexer |
| US4122311A (en) * | 1977-10-13 | 1978-10-24 | Hughes Aircraft Company | Electronic multiplexer for parallel, bi-directional scanning thermal imaging system |
| US4270204A (en) * | 1978-12-22 | 1981-05-26 | Raytheon Company | Multiplexer circuit |
-
1981
- 1981-11-18 US US06/322,462 patent/US4409683A/en not_active Expired - Lifetime
-
1982
- 1982-11-15 JP JP83500147A patent/JPS58501981A/ja active Pending
- 1982-11-15 WO PCT/US1982/001612 patent/WO1983001880A1/en not_active Ceased
- 1982-11-15 JP JP58500147A patent/JPH0552686B1/ja active Pending
- 1982-11-16 DE DE8282306098T patent/DE3271686D1/de not_active Expired
- 1982-11-16 EP EP82306098A patent/EP0081917B1/en not_active Expired
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5075339A (https=) * | 1973-11-05 | 1975-06-20 | ||
| US4121055A (en) * | 1977-06-06 | 1978-10-17 | Microcom Corporation | Integrated programmable commutation and signal conditioning circuit |
| JPS5472949A (en) * | 1977-11-24 | 1979-06-11 | Hitachi Ltd | Multiplexer circuit |
Also Published As
| Publication number | Publication date |
|---|---|
| US4409683A (en) | 1983-10-11 |
| JPH0552686B1 (https=) | 1993-08-06 |
| WO1983001880A1 (en) | 1983-05-26 |
| DE3271686D1 (en) | 1986-07-17 |
| EP0081917B1 (en) | 1986-06-11 |
| EP0081917A1 (en) | 1983-06-22 |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| JPS58501981A (ja) | プログラム可能なマルチプレクサ | |
| US7027330B2 (en) | Multi-input/output repair method of NAND flash memory device and NAND flash memory device thereof | |
| EP0354658A2 (en) | Method and apparatus for programming and verifying programmable elements in programmable devices | |
| US4903231A (en) | Transposition memory for a data processing circuit | |
| KR880011797A (ko) | 반도체 기억장치 | |
| JPS61294562A (ja) | 半導体記憶装置 | |
| KR100578141B1 (ko) | 읽기 속도를 향상시킬 수 있는 낸드 플래시 메모리 장치 | |
| JPS5894187A (ja) | 半導体記憶装置 | |
| JPH06309875A (ja) | 半導体メモリ装置のデコーディング回路及びデコーディング方法 | |
| JP2982902B2 (ja) | 半導体メモリ | |
| JPS6151237A (ja) | 信号発生器 | |
| US4809229A (en) | Data processing integrated circuit with improved decoder arrangement | |
| JP2000021190A (ja) | 半導体記憶装置 | |
| EP0373714A1 (en) | Coupling network for a data processor, comprising a series connection of at least one crossbar switch and at least one array of silos, and data processor comprising such a coupling network | |
| JP2575752B2 (ja) | マルチポートメモリ | |
| JPH0352159B2 (https=) | ||
| JPS6255171B2 (https=) | ||
| US5758167A (en) | Interrupt management unit and a method for identifying an interrupt request having the highest priority | |
| JP2922963B2 (ja) | シーケンスコントローラ | |
| JPH05314788A (ja) | リダンダンシ回路 | |
| JPS6118832B2 (https=) | ||
| JPH0689583A (ja) | デコーダとそのレイアウト | |
| JPH02128393A (ja) | 直列制御回路を有するメモリ | |
| JPS61288227A (ja) | レジスタ選択回路 | |
| JPH02292796A (ja) | 半導体記憶装置 |