JPS5848099U - Chip select circuit - Google Patents
Chip select circuitInfo
- Publication number
- JPS5848099U JPS5848099U JP14155481U JP14155481U JPS5848099U JP S5848099 U JPS5848099 U JP S5848099U JP 14155481 U JP14155481 U JP 14155481U JP 14155481 U JP14155481 U JP 14155481U JP S5848099 U JPS5848099 U JP S5848099U
- Authority
- JP
- Japan
- Prior art keywords
- chip select
- select circuit
- connection
- circuit
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Abstract
(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.
Description
第１図は従来の選択方式設定可能なチップセレクト回路
の回路図、第２図は本考案の実施例回路図第３図は実施
例接続部の接続模式−で拡散層切り換えマスクＲＯＭの
場合、第４図は同じく接続模式図でコンタクト切り換え
の場合である。
１．１１・・・・・・チップセレクト入力端子、２゜１
２・・・・・・電源端子、３． ４． ５． ｔ３．
１４・・・−・・チップセレクト回出力の内部接続端
子、６，１６・・・・・・内部ロウアクティブ回路の入
力接続端子、７゜１７・・・・・・内部ロウ゛アクティ
ブ回路、８．１８・・・・・・チップセレクト回路、１
９・・・・・・チップセレクト回路の電源供給部のＧＮ
Ｄ接続端子、２０・・・・・・チップセレクト回路の電
源供給部のＶｃｃ接続端子、−２１・・・・・・チップ
セレクト回路の電源供給端子、２２・・・・・・チップ
セレクト回路の電源供給部、２３・・・・・・チップセ
レクト回路出力の内部接続部、２４゜２６・・・・・・
接続部各端子の拡散層、２５・・・二接続データ拡散層
、２７．２８・・・・・・接続部各端子の配線層（例え
ばアルミ、ポリシリ）、２９・・・・・・接続部−異種
配線層間の接続データコンタクト、Ｔｒｌ。
Ｔｒ２． Ｔｒ５． Ｔｒ５・・・・・・ディプレッシ
ョン型トランジスタ、Ｔｒ３． Ｔｒ４． Ｔｒ７．
Ｔｒｌ３−−−−−−ｘンハンスメント型トランジスタ
。、FIG. 1 is a circuit diagram of a conventional chip select circuit that can set the selection method, FIG. 2 is a circuit diagram of an embodiment of the present invention, and FIG. 3 is a connection diagram of an embodiment of the connection section. In the case of a diffusion layer switching mask ROM, FIG. 4 is also a schematic connection diagram and shows the case of contact switching. 1.11...Chip select input terminal, 2゜1
2...Power terminal, 3. 4. 5. t3.
14...--Internal connection terminal for chip select circuit output, 6, 16...Input connection terminal for internal row active circuit, 7.17...Internal row active circuit, 8. 18... Chip select circuit, 1
9... GN of the power supply section of the chip select circuit
D connection terminal, 20... Vcc connection terminal of the power supply section of the chip select circuit, -21... Power supply terminal of the chip select circuit, 22...... Vcc connection terminal of the power supply section of the chip select circuit. Power supply section, 23... Chip select circuit output internal connection section, 24° 26...
Connection section Diffusion layer for each terminal, 25...Two-connection data diffusion layer, 27.28...Connection section Wiring layer for each terminal (e.g. aluminum, polysilicon), 29...Connection section - Connection data contact, Trl, between different wiring layers. Tr2. Tr5. Tr5...Depression type transistor, Tr3. Tr4. Tr7.
Trl3----x enhancement type transistor. ,
Claims (1)
レクト回路の電源供給端子を、異なる電源の任意の一つ
に選択接続可能にしたことを特徴とするチップセレクト
回路。A chip select input circuit for a ROM, characterized in that a power supply terminal of the chip select circuit can be selectively connected to any one of different power supplies.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14155481U JPS5848099U (en) | 1981-09-24 | 1981-09-24 | Chip select circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP14155481U JPS5848099U (en) | 1981-09-24 | 1981-09-24 | Chip select circuit |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS5848099U true JPS5848099U (en) | 1983-03-31 |
| JPS6112634Y2 JPS6112634Y2 (en) | 1986-04-19 |
Family
ID=29934650
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP14155481U Granted JPS5848099U (en) | 1981-09-24 | 1981-09-24 | Chip select circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS5848099U (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS619017A (en) * | 1984-05-31 | 1986-01-16 | ゼネラル・エレクトリック・カンパニイ | Programmable buffer |
| JPS61233499A (en) * | 1985-04-04 | 1986-10-17 | アメリカン・マイクロシステムズ・インコ−ポレイテツド | Reference voltage generation circuit and control thereof |
-
1981
- 1981-09-24 JP JP14155481U patent/JPS5848099U/en active Granted
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS619017A (en) * | 1984-05-31 | 1986-01-16 | ゼネラル・エレクトリック・カンパニイ | Programmable buffer |
| JPS61233499A (en) * | 1985-04-04 | 1986-10-17 | アメリカン・マイクロシステムズ・インコ−ポレイテツド | Reference voltage generation circuit and control thereof |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS6112634Y2 (en) | 1986-04-19 |
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