JPS5831465A - Processor controlling system - Google Patents

Abstract

PURPOSE:To easily execute execution start and stop control between mutual processors even in case of those which have fixed their circuits, by providing a common memory of a main control processor and a processor to be controlled, and a controlling circuit for sending out a control signal to the processor to be controlled, in accordance with a control order from the main control processor. CONSTITUTION:This system is provided with a common memory 31 to which a main control processor (MPU) 1 and MPUs 2, 3 to be controlled are capable of accessing, and a controlling circuit 33 for decoding a control order of the MPU 1 and applying an interruption signal and a reset signal to the MPUs 2, 3. This controlling circuit 33 generates a reset signal to the MPUs 2, 3 in accordance with a start order of the MPU 1, the MPUs 2, 3 execute start processing from a specific address, read out information of a specific area of the memory 31 at the time of stop, set it as an internal state at the time of start, and shift to an execution state. Also, the controlling circuit 33 generates an interruption which cannot be inhibited, to the MPUs 2, 3 in accordance with a stop order of the MPU 1, and the MPUs 2, 3 execute stop processing, write an internal state at the time of the interruption in a specific area of the memory 31, and shift to a stop state after it has been accumulated.