JPS5827573Y2 - transmitting circuit - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a transmission circuit suitable for multiplex control of loads using carrier waves, such as power carrier control.

When performing multiple load control using power line transport or the like, since the impedance of the power line is low, it is necessary to lower the transmission impedance when a transmitter sends a control signal to the power line.

This type of transmitter has a low transmission impedance both when transmitting control signals and when not transmitting control signals.In this case, as the number of transmitters increases, the impedance of the transmitter seen from the power line decreases, so the transmitter The level of the control signal sent out may be so low that it may not reach the receiver.

More specifically, FIG. 1 shows a power line carrier multiplex control system, in which both ends of an AC power source 1 are connected to a power line 3 via a block filter 2 for preventing signal leakage, and a transmitter 4 is connected to the power line 3. 5, receivers 8 and 9 to which controlled loads 6 and 7 are connected are inserted.

Therefore, the transmitters 4 and 5
The control signal from the load 6 is superimposed on the control signal from the load 6 via the receivers 8 and 9.
, 7 is performed.

Output signals from each of the transmitters 4 and 5. That is, the control signals each have a unique frequency, for example, the transmitter 4 and the receiver 8
A transmitter 5 is provided to control a receiver 9.

1 As shown in FIG. 2, a control signal CH1, which is the output of the transmitter 4, is transmitted to the power line for a time T1, and after a time To, a control signal CH1, which is the output of another transmitter 5, is transmitted. CH2 is sent out for a time T2, and again after a time To, the control signal CH2 is sent out from the transmitter 4 for a time Tl.

The control signals CHl and CH2 are transmitted to the receivers 8 and 9, respectively.
and controls the loads 6 and 7.

10.11 is a control switch for each transmitter 4,50.

As described above, the control signal CH sent from each transmitter 4, 5
.

CH2 is separately sent to the power line 3, but in order to cope with changes in the line impedance of the power line 3 with respect to signal frequency due to changes in the number of loads inserted, the transmitters 4 and 5 are driven by a constant voltage drive. The transmission impedance was lowered by using a mold.

However, in conventional transmission circuits of this type, when a plurality of transmitters are inserted, for example, another transmitter 5 acts as a load for the transmitter 4, that is, the impedance of the transmitter 5 as well as the impedance of the loads 6 and 7 is applied in parallel to the power line 3.

Therefore, the impedance of the power line 3 seen from the transmitter 4 decreases, and the control signal CH sent from the transmitter 4,
The problem is that the level of the signal is so low that it does not reach the receiver 8.

The purpose of the present invention is to improve the above-mentioned drawbacks, and to provide a transmitter circuit that has a low transmitting impedance when transmitting, and conversely makes the transmitting impedance low when not transmitting to ensure that the signal reaches the receiver. It is something to do.

The present invention will be described in detail with reference to Figures 3 to 5.

As shown in FIG. 3, the transmitting circuit of the present invention forming the transmitter connected to the AC power supply 1 includes a power supply circuit 12, a transmission control pulse generation circuit 135, an oscillation circuit 14. Burst circuit 15. A driver circuit 16 is provided.

More specifically, the anode of a diode D1 of the power supply circuit 12 is connected to one end of the AC power supply 1, and the anode of the diode D1 is connected to one end of the AC power supply 1.
The cathode of the diode D2 is connected to the anode of the diode D2 via the resistor R1.

The cathode of the diode D2 is connected to the cathode of a Zener diode ZD1 whose anode is grounded, and a capacitor C1 is connected in parallel to the Zener diode ZD1.

Therefore, the power supply circuit 12 obtains a DC voltage by half-wave rectifying the voltage of the AC power supply 1 with the diodes D□ and D2, and further smoothing it with a parallel circuit of the Zener diode ZD1 and capacitor C1.

The cathode of the diode DI of the power supply circuit 12 is connected to the other end of the AC power supply 1 through a series circuit of resistors R2*R3 of the transmission control pulse generating circuit 13 in the housing and is grounded. A connection point is connected to the input end of the first inverter gate G1 via a resistor R4.

The output terminal of the first inverter gate G1 is connected to the input terminal of the second inverter gate G2, and is also connected to one movable contact of the changeover switch S1.

The output terminal of the second inverter game (G2) is connected to the other movable contact of the changeover switch S1, and the fixed contact of the changeover switch S1 is connected to the capacitor C2 and the resistor R5.
It is connected to the input terminal of the third inverter gate G3 via a series circuit of.

Further, the connection point between the capacitor C2 and the resistor R5 is connected to the cathode of the diode D2 of the power supply circuit 12 via the resistor R6.

In addition, the input terminal of the third inverter gate G3 is grounded via a control switch S2.

The transmission control pulse generation circuit 13 inverts the voltage divided by the resistor R3 of the voltage of the AC power supply 1 half-wave rectified by the diode D1 of the power supply circuit 12, and further inverts the divided voltage by the first inverter gate G1. The output of one inverter gate G1 is inverted by a second inverter gate G2.

In this case, by switching the changeover switch S1, the first
The output of the inverter game) G□ or the output of the second inverter game) G2 is selected, and the selected output is differentiated by a differentiating circuit made up of the capacitor C2 and the resistor R6.

This differential output is inverted by the third inverter gate G3, but when the control switch S2 is closed, the input terminal of the third inverter gate G3 is grounded and becomes zero potential, so the differential output is inverted by the third inverter gate G3. The output terminal of the third inverter gate G3 is not input to the third inverter gate G3, but a high level output is given to the output terminal of the third inverter gate G3.

A resistor R7? is connected to the input and output terminals of the inverter gate G4 of the oscillation circuit 14. and a parallel circuit of the coil L1 are connected, and the input terminal of the fourth inverter gate G4 is connected to the capacitor C.
3, and its output end is grounded via a capacitor C4.

One end of a capacitor C5 is connected to the output end of the fourth inverter gate G4.

The oscillation circuit 14 includes the coil L1 and the capacitor C.
It oscillates at a resonance frequency of 3°C4 and provides an oscillation output to the bursting circuit 15.

The output terminal of the third inverter gate G3 of the transmission control pulse generation circuit 13 is connected to the base of the transistor Q1 of the bursting circuit 15 via a resistor R8, and the emitter of the transistor Q1 is grounded.

The collector of the transistor Q1 is connected to the oscillation circuit 14.
A resistor R9 is inserted between the other end of the capacitor C5 and the ground.
The connection point between the capacitor C5 and the resistor R9 is connected to the connection point of the 1R10 series circuit, and the connection point between the capacitor C5 and the resistor R9 is grounded via the resistor R1□.

Also, the connection point between the resistor R9 and RIO is the resistor R12tR□3
is grounded through a series circuit.

The bursting circuit 15 operates to apply or not apply the oscillation output of the oscillation circuit 14 to the series circuit of the resistors R□2tR□3 as the transistor Q1 connected in parallel with the resistor RIO is turned off.

Transistor Q2 that performs the transmission function of the driver circuit 16
The resistor R12t of the bursting circuit 15 is connected to the base of the bursting circuit 15.
The connection point of R13 is connected, the collector of the transistor Q2 is connected to the cathode of the diode D2 of the power supply circuit 12, and the emitter of the transistor Q2 is connected to an intermediate tap provided on the primary winding of the transformer T1. ing.

In the transformer T1, one end of the primary winding is grounded,
The other end is grounded via capacitor C6, and the residue 2
One end of the next winding is grounded, and the other end is connected to the anode of the diode D1 of the power supply circuit 2 via a capacitor C7.

The driver circuit 16 connects the transistor Q2 to B
It is biased to perform class-C operation or class-C operation close to class-B, and is further set so that the primary winding of the transformer T1, which is an emitter load, resonates with the oscillation frequency of the oscillation circuit 14.

Therefore, when the output of the bursting circuit 15 is given to the driver circuit 16, the transmission impedance at the emitter of the transistor Q2 becomes very small, and the winding ratio of the primary winding and secondary winding of the transformer T1 is adjusted appropriately. By selecting this, the control signal can be transmitted with impedance matching with the power line 3 shown in FIG.

Conversely, when no output is given from the bursting circuit 15, the transistor Q2 becomes non-conductive, and the transmission impedance at the terminal of the transistor Q2 becomes extremely high, causing the secondary winding of the transformer T to become extremely high. The impedance seen from the side toward the primary winding is related only to the impedance at the time of resonance of the primary winding of the transformer T1.

Furthermore, the operation of the present invention will be explained in detail.

The voltage of the alternating current power supply 1 as shown in FIG.

The terminal voltage of the resistor R3 is applied to the first inverter G1, and the output of the first inverter gate G1 is applied to the second inverter gate G2.

Therefore, the output of the first inverter gate G1 has a waveform that is an inversion of the half-wave rectified voltage waveform of the AC power supply 1 shown in FIG. 4A.

The output of the second inverter game G2 is a half-wave rectified waveform of the voltage waveform of the AC power supply 1.

The outputs of these inverter gates G1 and G2 are selected by the changeover switch S□, and the capacitor C2 and resistor R
It is differentiated by a differentiator circuit consisting of 6.

Therefore, when the changeover switch S1 is switched to the first inverter gate G2 side, the differentiation circuit is switched to the AC power source 1.
A negative pulse is generated every time the voltage becomes the phase rOJ, and a positive pulse is generated every half cycle when the phase becomes "π".

(In addition, the changeover switch Sl is connected to the second inverter game)
When switched to the G2 side, the differentiating circuit is connected to the AC power supply 1.
A positive pulse is generated every phase rOJ, and a negative pulse is generated every phase "π".

When the control switch S2 is open, this differential output is given to the third inverter gate G3, but only when the differential output is a positive pulse, the third inverter gate G3 changes from high level to low level. It transposes to the level and becomes active.

Therefore, when the changeover switch S1 is switched to the first inverter gate G2 side, the transmission control pulse generation circuit 13 obtains an output as shown in FIG. 4B.

In the figure, the chain line indicates the output waveform when the changeover switch S1 is switched to the second inverter gate G2 side.

When the output of the transmission control pulse generation circuit 13 changes to low level, the transistor Q of the bursting circuit 15
1 is cut off, the oscillation output of the oscillation circuit 14 is transmitted to the bursting circuit 15 as shown in FIG. 4C,
The voltage is applied to the driver circuit 6 through resistors R1□ and R13, driving the transistor Q2 into conduction.

At this time, the primary winding of the transformer T□ connected to the emitter of the transistor Q2 of the driver circuit 16 resonates with the oscillation frequency of the oscillation circuit 14 and sends out a control signal of the same frequency, and the driver circuit 16 also transmits a control signal of the same frequency. The impedance decreases as shown by DKzo (however, 2°<<ZF) in FIG.

Conversely, when the output of the transmission control pulse generation circuit 3 is at level..., the transistor Q1 of the bursting circuit 15
becomes conductive and short-circuits the series circuit of resistors R12t and R13.

Therefore, the oscillation output of the oscillation circuit 14 is not applied to the driver circuit 16, the transistor Q2 of the driver circuit 16 is cut off, no control signal is sent out, and the transmission impedance zF becomes extremely high as shown in Figure 4.

FIG. 5 shows another embodiment of the transmitting circuit of the present invention, and the power supply circuit 12a is the same as the embodiment of FIG.

Resistors 'R14 and 'R1 of the transmission control pulse generation circuit 13a
One end of the series circuit No. 5 is connected to the cathode of the diode D1 of the power supply circuit 12a, and the other end is connected to the other end of the AC power supply 1a and grounded.

The connection point of the resistors R14t and R15 is connected via the resistor R16 to the input terminal of the first NOR gate t'Gs (in this case, it operates as an inverter since it is powered by one person), and the output terminal of the first NOR gate G5 is , Second Noah Gate G
6, and is also connected to the input terminal of capacitor C8 and resistor R.
The third NOR gate G7 is connected through a series circuit of □7tR□8.
is connected to one input terminal of the

Also, the connection point between the capacitor C3 and the resistor R□7 is the resistor R1.
9, and the connection point between the resistors R17 and R18 is grounded via a control switch S3.

The output terminal of the second NOR gate G6 is connected to a capacitor C9,
It is connected to the other input terminal of the third NOR gate G7 through a series circuit of resistors R20 and R21, and the connection point between the capacitor C9 and resistor R20 is grounded through resistor R22. The connection point is grounded via another control switch S4.

A resistor R23 is connected to the input/output terminal of the fourth NOR gate G8 of the oscillation circuit 14a, and the input terminal of the fourth NOR gate G8 is grounded via a series circuit of the resistor R24 and the capacitor CIO. The output terminal of the NOR gate G8 is grounded via the capacitor C1l, and the output terminal of the NOR gate G8 is grounded via the capacitor C1l.
4 and the capacitor CIO are connected to the output terminal of the fourth NOR gate G8 via the coil L2.

Further, a capacitor C is connected to the output terminal of the fourth NOR gate G8.
One end of 12 is connected.

Transistor Q that performs the transmitting function of the bursting circuit 15a
3 is connected to the output terminal of the third NOR gate G7 of the transmission control pulse generation circuit 13a via a resistor R25, and the emitter of the transistor Q3 is grounded.

The collector of the transistor Q3 is connected to the other end of the capacitor C12 of the oscillation circuit 14a via a resistor R26, and also to the cathode of a diode D3, and the anode of the diode D3 is grounded.

Further, the capacitor C12 and the resistor R26 of the oscillation circuit 14a
The connection point of is grounded through the resistor 'R27, and the connection point of the resistor R
The connection point between 26 and the cathode of diode D3 is resistor R28.
It is grounded through a series circuit of JR29.

The base of the transistor Q4 of the driver circuit 6a is connected to the connection point of the resistors R28 and R29 of the bursting circuit 15a, the collector of the transistor Q4 is connected to the cathode of the diode D2 of the power supply circuit 12a, and the transistor Q4 The emitter of is grounded via a resistor R30 and connected to an intermediate tap provided on the primary winding of the transformer T2.

The transformer T2 has one end of the primary winding grounded,
The other end is grounded via a capacitor C13, one end of the secondary winding is also grounded, and the other end is grounded via a capacitor C14 to the anode of the diode DI of the power supply circuit 12a.

In the embodiment shown in FIG. 5, the output of the transmission control pulse generation circuit 13a is the control switch S3,
When both of the control switches S4 and S4 are closed, both input terminals of the third NOR gate G7 have a low potential, so a high level output is obtained.When either of the control switches S3 and S4 is closed, a high level output is obtained. A low level output is obtained every zero cycle or half cycle of the AC power source 1, and the control switch S
3.

The embodiment is different from the embodiment shown in FIG. 1 in that when both S4 are closed, a low level output is obtained every zero cycle and half cycle of the AC power source 1, but the other configuration and operation are as shown in FIG. 3. It is similar to the transmission circuit of

As mentioned above, the transmitting circuit of the present invention has a low transmitting impedance when transmitting control signals, and a high transmitting impedance when not transmitting control signals, so when not transmitting control signals, it becomes a load on other transmitters and has an adverse effect. It is possible to guarantee reliable transmission without any problems.

The transmitting circuit of the present invention is not limited to power line carrier control, but can also be sufficiently applied to control systems having dedicated communication lines.

[Brief explanation of the drawing]

Figure 1 is a simplified diagram of the power line carrier multiplex control system, Figure 2 is an explanatory diagram of the same, Figure 3 is a transmission circuit diagram of the present invention, Figure 4 is a waveform diagram of each part of the same, and Figure 5 is another diagram of the present invention. It is a circuit diagram of an example. 1... AC power supply, 2... Block filter, 3... Power line, 4, 5... Transmitter, 6, 7... Load, 8, 9... Receiver, io, 1i... Control switch, 12, 1
2a...Power supply circuit, 13, 13a...
Transmission control pulse generation circuit, 14, 14a... oscillation circuit, 15, 15a... bursting circuit, 1
6.16a... Driver circuit, Dl-D3.
...Diode, ZDl...Zener diode, 01~G8...Gate circuit, Q1~
Q4° bent transistor, Ll, L2...Coil, T1, T2...Transformer, R1-R3
0... Resistor, C1-C14... Capacitor, Sl... Changeover switch, S2-S4...
...Control switch, CHl t ch2°°°°
°°Control signal.

Claims (1)

[Scope of utility model registration request] In a transmission circuit used for multiplex control of loads by power line transport between a plurality of transmitters and receivers connected in parallel with a power line, the driver circuit at the final stage of the transmission circuit has an output that constitutes a tank circuit tuned to the carrier frequency. A transmitting circuit comprising a quadrangle and a transmitting transistor that performs approximately class B operation, the emitter of the transistor being connected to an intermediate tap of a primary winding of the output quadrangle to form an emitter follower.