JPS58218164A - Thick film printed substrate - Google Patents
Thick film printed substrateInfo
- Publication number
- JPS58218164A JPS58218164A JP9386682A JP9386682A JPS58218164A JP S58218164 A JPS58218164 A JP S58218164A JP 9386682 A JP9386682 A JP 9386682A JP 9386682 A JP9386682 A JP 9386682A JP S58218164 A JPS58218164 A JP S58218164A
- Authority
- JP
- Japan
- Prior art keywords
- pattern
- powder
- conductive pattern
- resistive
- thick film
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48225—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
- H01L2224/48227—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/01—Chemical elements
- H01L2924/01046—Palladium [Pd]
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/0266—Marks, test patterns or identification means
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
- H05K1/092—Dispersed materials, e.g. conductive pastes or inks
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/16—Printed circuits incorporating printed electric components, e.g. printed resistor, capacitor, inductor
Landscapes
- Structure Of Printed Boards (AREA)
- Wire Bonding (AREA)
Abstract
Description
【発明の詳細な説明】
この発明は、セラミック等の基板に導体路や抵抗体を形
成し、さらにトランジスタやモノリシックＩＣ等を固着
形成、させるＶ、膜Ｈ工Ｃ等に用いられる厚膜印刷基板
に関するものである。DETAILED DESCRIPTION OF THE INVENTION This invention is a thick film printed substrate used for V, film H, etc., in which conductive paths and resistors are formed on a substrate such as a ceramic, and furthermore, transistors, monolithic ICs, etc. are firmly formed. It is related to.
厚膜ＨＸａは、従来より、大電力用Ｘａを作ることが可
能で、多種少量生産にもｉＭ していて、自動車のイグ
ナイタ用や電子供器のＤ／Ａ変換変換フンバー圧使用さ
れている。そしてこの厚験Ｈ工Ｃは、他の半導体利用装
置と異る独特な構造、すな □わち、第１図に
示すように、セラミック板ｌ上に貴金属をペースト状に
して、スクリーン印刷法により導体パターン２を形成し
、シート抵抗を正確に設定した抵抗体パターン３を形成
し、保護被膜としてガラスパシベーショノ膜４を被覆キ
せて得られる厚膜印刷基板５を用いる点に特色がある。Thick film HXa has conventionally been able to produce Xa for high power use, and is also suitable for small-volume production of a wide variety of products, and is used for automobile igniters and D/A conversion converters for electronic devices. This Atsuken H-C has a unique structure that differs from other semiconductor-based devices. In other words, as shown in Figure 1, precious metals are made into paste form on a ceramic plate, and a screen printing method is used. It is characterized by the use of a thick film printed board 5 obtained by forming a conductor pattern 2, forming a resistor pattern 3 with an accurately set sheet resistance, and coating it with a glass passivation film 4 as a protective film. There is.
この厚膜印刷基板５は、上述の通り、基板ｌがセラミッ
ク等の耐熱性及び絶縁性が良好なものを用いるので、モ
ノリシツクエＣの欠点の一つである各素子のアイソレー
ショ／の時寄生容量が大となり高周波特性が劣る点全補
え、しかもトランジスタ素子等のディスクリート部品を
組合せて試作した回路とそっくりなままの回路を生産可
能である長所があるものの、次に述べる改善すべき問題
がある。As mentioned above, this thick film printed circuit board 5 uses a material with good heat resistance and insulation properties, such as ceramic, for the substrate l, so that the parasitic capacitance at the time of isolation of each element, which is one of the drawbacks of the monolithic board C, is reduced. Although it has the advantage of completely compensating for the disadvantages of high frequency characteristics and inferior high-frequency characteristics, and also being able to produce circuits that look exactly like prototype circuits made by combining discrete components such as transistor elements, there are problems that need to be improved as described below.
すなわち、第１図に示した厚膜印刷基板５は、厚膜ＨＩ
Ｏとするために、別個にｐｎ接合を形成して得たトラン
ジスタ素子やモノリシックＩＯ６を、基板ｌ上の露出余
白部分７に、半田８を用いて固着し、ｆｉ、ｕやＡＩ等
の細線９，９．・・・・・・を使用して、導体パターン
２や時には抵抗体パターン３と橋架接続させる作業が必
要で、半ＬＨ付は固着や細線ボンディングのために、是
非とも基４ｖ １の正確な位置決めが要求される。とこ
ろが、厚膜印刷基板５は、先述の通り、導体パターン２
が先に印刷され次いで抵抗体パターン３が形成されてい
るので１位置決め精度が、次の理由で低下するのである
。つまり、厚膜印刷基板の基板１を位置決めする場合に
は工ＴＶカメラと図形パターン記憶部 ゛を有するパタ
ーン認識装置門採用して、導体パタ［′
一ン２の位置座標を認識して所定位置に位色゛決めして
いる。しかし、現実間−として、導ｐ・パターン２自身
は、ＩＴＶカメラ１で画像を撮影する時光反射性が良好
であるものの１．はぼ光反射性が近似している基板ｌの
表面に形成されているために、パターン輪郭が不鮮明と
なるのである。そこで、導体パターン２よりも上地・の
抵抗体パターン３を撮影して位置決めしようとすれば、
光反射性が不良であり、位置座標認識が困難であった。That is, the thick film printed board 5 shown in FIG.
0, the transistor element or monolithic IO 6 obtained by separately forming a pn junction is fixed to the exposed margin 7 on the substrate l using solder 8, and thin wires 9 such as fi, u, and AI are bonded to the exposed margin 7 on the substrate l. ,9. It is necessary to bridge-connect the conductor pattern 2 and sometimes the resistor pattern 3 using ... is required. However, as mentioned above, the thick film printed circuit board 5 does not have the conductor pattern 2.
Since the resistor pattern 3 is printed first and then the resistor pattern 3 is formed, the positioning accuracy is reduced for the following reason. In other words, when positioning the substrate 1 of a thick film printed circuit board, a pattern recognition device having a TV camera and a graphic pattern storage section is used to recognize the position coordinates of the conductor pattern ['] and position it at a predetermined position. I have decided on the color. However, in reality, although the guiding p-pattern 2 itself has good light reflectivity when taking images with the ITV camera 1; Since it is formed on the surface of the substrate l, which has similar light reflectivity, the pattern outline becomes unclear. Therefore, if you try to photograph and position the resistor pattern 3 above the conductor pattern 2,
The light reflectivity was poor, making it difficult to recognize positional coordinates.
この発明は、上、記従来の厚膜印刷基板の位置決め精度
低下を解決するために提案するもので、基板上に予め導
体パターンとの光反射フントラストが大である下地パタ
ーンを形成して後、その上に導体パターンを印刷して焼
成し、係挿被膜を形成したことを特徴としている。以下
この発明の詳細な説明する。This invention is proposed in order to solve the problem of the above-mentioned deterioration in positioning accuracy of the conventional thick-film printed circuit board. , a conductive pattern is printed thereon and fired to form an intercalating film. This invention will be described in detail below.
実施例
第２図は、この発明の一実施例を示す厚膜印刷基板の要
部断面図である。第２図において、１゜は、主組成分で
あるアルミナＡｅ２０３が９６％以上で耐熱、耐蝕性漏
び絶縁性良好なセラミック製基板、ｌｌは、酸化パラジ
ウムＰ’ｄＯの微粒子を銀パラジウムＡｇ −ｐＪｊ”
末合金で数−囲ませた状態にした粉体を、グリセ１ノン
やテレフタノール酸或いは硫酸アンモニウム等に、フリ
ットガラス粉末とともに混合シたペーストを、スクリー
ン印刷法で、特にペーストをスキージですく場合に弾性
変形が起らないメタルマスクスクリーンを用いて、所望
のパター７通りに印刷した下地パターンの一例としての
抵抗体パターンである。この抵抗体パターン１１は、ス
クリーン印刷抄、低温乾燥させて、約７５０〜８５０°
Ｃで焼成したもので、黒色を呈し光反射性が低い。さて
、１２は、Ｐｄ−Ａｇ粉末とはうけい酸ガラスフリット
との混合粉末を有機溶媒中に均一分散させてペーストと
し、抵抗体パターν１１と同様にしてその上に印刷して
、５００〜７００°Ｃで焼成１して得た導体パターンで
、銀白色を呈し基板１０と光反射性がほぼ同程度である
。Embodiment FIG. 2 is a sectional view of essential parts of a thick film printed circuit board showing an embodiment of the present invention. In Fig. 2, 1° is a ceramic substrate with 96% or more of alumina Ae203 as the main component and has good heat resistance, corrosion resistance, and leakage insulation, and 1 is a ceramic substrate made of silver palladium Ag - pJj”
A paste made by mixing powder surrounded by powdered alloy with glycerinone, terephthanolic acid, ammonium sulfate, etc. together with frit glass powder is produced by screen printing, especially when scooping the paste with a squeegee. This is a resistor pattern as an example of a base pattern printed in seven desired patterns using a metal mask screen that does not undergo elastic deformation. This resistor pattern 11 is made by screen printing and drying at a low temperature of about 750 to 850 degrees.
It is fired with C and has a black color and low light reflectivity. Now, 12 is a paste made by uniformly dispersing a mixed powder of Pd-Ag powder and silicate glass frit in an organic solvent, and printed on it in the same manner as the resistor pattern ν11. The conductive pattern obtained by firing 1 at 1° C. has a silvery white color and has almost the same light reflectivity as the substrate 10.
そして１３は、従来と同様な絶縁性、耐蝕性が秀れ、透
明度が良好なガラス系の保誇扱膜としてのカラスパシベ
ーンヨン膜である。尚その（（１４］第１図に同様な図
番記号のものは、同一の部材である。Reference numeral 13 denotes a glass-based maintenance film that has excellent insulation properties, corrosion resistance, and transparency similar to the conventional glass-based maintenance film. Note that ((14) Items with the same figure numbers and symbols as in FIG. 1 are the same members.
上記構造とした厚膜印刷基板が従来と異る特徴は、第１
図と第２図とを比較すれば８１１白な；１！ｊす、抵抗
体パターン１１と導体パターン１２との上下積層配置が
逆転していることであり、この点は単に配置変更に止ま
らず、完成した厚膜印刷基板のダイボンディングやワイ
ヤボンデインクのための位置決め精度を著しく向上させ
る。すなわち、この実施例の厚膜印刷基板は、黒色で光
反射性が低い抵抗体パターン１１が下地、となり、その
上に銀白色で光反射性が高い導体パターン１２を形成［
７ているので、■ＴＶカメラでパターン２自身のために
光’ｌｔパターンを撮影する際のコントラストが大きく
、導体パターン１２の輪郭を鮮明にして、Ｌ ｆｔがっ
て良質の光学像−白黒レベルの２４＠化が良好−記憶パ
ター／との座標位慣合否判定が確実となるからであるっ
しかも現実問題として、導体パターン１２のパターン認
識精度は２００μｍ以下が要求されるのに対して、各抵
抗体、導体パターンの印刷時の許容差は２００〜３００
μｍであるので、導体パターン２上に抵抗体パターン３
が配置される従来のものでは、パターン認識精度が、抵
抗体パターン３の相対位置に左右され、位置決め精度が
必然的に低下するのに対して、この厚膜印刷基板は、導
体パターン１２を位に＆出用マーキングとして利用でき
位置決め精度が向上するのである。The features of the thick film printed circuit board with the above structure that differ from conventional ones are:
Comparing the figure and Figure 2, 811 white; 1! jsu, the upper and lower lamination arrangement of the resistor pattern 11 and the conductor pattern 12 is reversed, and this point is not limited to simply changing the arrangement, but is also necessary for die bonding and wire bonding ink of the completed thick film printed circuit board. Significantly improves positioning accuracy. That is, in the thick film printed circuit board of this example, the resistor pattern 11, which is black and has low light reflectivity, serves as the base, and the conductor pattern 12, which is silvery white and has high light reflectivity, is formed on it.
7, so the contrast when photographing the light pattern for pattern 2 itself with a TV camera is large, the outline of the conductor pattern 12 is clear, and the L ft is high, resulting in a high quality optical image - black and white level. 24@ is good - it is possible to reliably determine whether or not the coordinate position conforms to the memorized pattern/ Tolerance when printing resistor and conductor patterns is 200 to 300
μm, so the resistor pattern 3 is placed on the conductor pattern 2.
In the conventional type in which the conductor pattern 12 is arranged, the pattern recognition accuracy depends on the relative position of the resistor pattern 3, and the positioning accuracy inevitably decreases. The positioning accuracy can be improved by using it as a marking for the arrival and departure.
尚以上の実施例の他に、この発明は、要するに導体パタ
ーンを位置検出用マー・ｉ・ングとして利用できれば、
実現用能なので、製造原価や設計の煩雑さを排除できる
と仮定すれば、従来の第１図に示したもので、その余白
部に、本来不要であるが、第３図のように、抵抗体パタ
ーン脈１１′を下地パターンとし、さらに導体パターン
１２’で縁取りしてもよい。しかしこの場合は、位置決
めのためのパターン認識には不都合な抵抗杯パター７３
が、導体パターン２をさえぎらないようにして行う必要
があり、上述の実施例には及ばない。In addition to the above-mentioned embodiments, the present invention has the following advantages:
Assuming that manufacturing costs and complexity of design can be eliminated, it is possible to eliminate the manufacturing cost and complexity of the design. The body pattern veins 11' may be used as a base pattern, and the conductor pattern 12' may be used for edging. However, in this case, the resistance cup putter 73 is inconvenient for pattern recognition for positioning.
However, it is necessary to do this without blocking the conductor pattern 2, and it is not as good as the above-mentioned embodiment.
この発明によれば、予め抵抗体パターンを下地１影成し
て後、その上に導体パターンが印刷され、いわば、従来
の印刷工程順を逆１ｒ、させる最も簡単な構成５によっ
て、厚膜印刷基板の位置決め精度向□
上が図れる優れた作用効果力１あるＯ
１
：・
［１According to this invention, a resistor pattern is formed in advance on a base layer 1, and then a conductor pattern is printed on it.Thick film printing is performed using the simplest configuration 5, in which the conventional printing process order is reversed, so to speak. Excellent action and effect that can improve board positioning accuracy □ O 1:・[1
第１図は、従来の厚膜印刷基板の要部断面図、第２図は
、この発明の一実施例を示す厚膜印刷基板の要部断面図
、第３図は、その仙の実施例を示した要部断面図である
。
１０・・・・・・基板、
１１ 、１１’・・・下地（抵抗体）パターン。
１２．１２’ ・・・・・導体パターン。
１３・・・・・・保設被膜。FIG. 1 is a cross-sectional view of a main part of a conventional thick-film printed circuit board, FIG. 2 is a cross-sectional view of a main part of a thick-film printed circuit board showing an embodiment of the present invention, and FIG. 3 is a further embodiment of the same. FIG. 10... Board, 11, 11'... Base (resistor) pattern. 12.12' ・・・Conductor pattern. 13... Preservation coating.
Claims (1)
宜印刷して焼成するものにおいて、予め導体パターンと
の光反射フントラストが大である下地パターンを形成し
て後、その上に導体パターンを印刷して焼成し保睦被膜
を形成したことを特徴とする厚膜印刷基板。In cases where a conductor pattern, a resistor pattern, and a protective film are appropriately printed and fired on a substrate, a base pattern with a high light reflection layer with the conductor pattern is formed in advance, and then the conductor pattern is printed on it. A thick film printed circuit board characterized in that it is baked to form a retaining film.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9386682A JPS58218164A (en) | 1982-05-31 | 1982-05-31 | Thick film printed substrate |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP9386682A JPS58218164A (en) | 1982-05-31 | 1982-05-31 | Thick film printed substrate |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS58218164A true JPS58218164A (en) | 1983-12-19 |
Family
ID=14094364
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP9386682A Pending JPS58218164A (en) | 1982-05-31 | 1982-05-31 | Thick film printed substrate |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS58218164A (en) |
Cited By (5)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6198491A (en) * | 1984-10-17 | 1986-05-16 | ル・マテリエル・ビオメデイカル | Automatic apparatus having several members to be displaced in mutual relation and driving thereof |
| JPS61190168U (en) * | 1985-05-20 | 1986-11-27 | ||
| JPS6265276U (en) * | 1985-10-16 | 1987-04-23 | ||
| EP0393206A1 (en) * | 1988-10-14 | 1990-10-24 | Matsushita Electric Industrial Co., Ltd. | Image sensor and method of producing the same |
| US5266828A (en) * | 1988-10-14 | 1993-11-30 | Matsushita Electric Industrial Co., Ltd. | Image sensors with an optical fiber array |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5785240A (en) * | 1980-11-17 | 1982-05-27 | Fujitsu Ltd | Semiconductor device |
-
1982
- 1982-05-31 JP JP9386682A patent/JPS58218164A/en active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5785240A (en) * | 1980-11-17 | 1982-05-27 | Fujitsu Ltd | Semiconductor device |
Cited By (8)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS6198491A (en) * | 1984-10-17 | 1986-05-16 | ル・マテリエル・ビオメデイカル | Automatic apparatus having several members to be displaced in mutual relation and driving thereof |
| JPH0531001B2 (en) * | 1984-10-17 | 1993-05-11 | Ru Materieru Biomedeikaru | |
| JPS61190168U (en) * | 1985-05-20 | 1986-11-27 | ||
| JPH0410707Y2 (en) * | 1985-05-20 | 1992-03-17 | ||
| JPS6265276U (en) * | 1985-10-16 | 1987-04-23 | ||
| JPH0450145Y2 (en) * | 1985-10-16 | 1992-11-26 | ||
| EP0393206A1 (en) * | 1988-10-14 | 1990-10-24 | Matsushita Electric Industrial Co., Ltd. | Image sensor and method of producing the same |
| US5266828A (en) * | 1988-10-14 | 1993-11-30 | Matsushita Electric Industrial Co., Ltd. | Image sensors with an optical fiber array |
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