JPS58172973A - Dc high voltage power source - Google Patents

Dc high voltage power source

Info

Publication number
JPS58172973A
JPS58172973A JP57055721A JP5572182A JPS58172973A JP S58172973 A JPS58172973 A JP S58172973A JP 57055721 A JP57055721 A JP 57055721A JP 5572182 A JP5572182 A JP 5572182A JP S58172973 A JPS58172973 A JP S58172973A
Authority
JP
Japan
Prior art keywords
voltage
inverter
period
transistors
transformer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP57055721A
Other languages
Japanese (ja)
Inventor
Shunichi Yuya
湯屋 俊一
Yoshitaka Ono
大野 義隆
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP57055721A priority Critical patent/JPS58172973A/en
Publication of JPS58172973A publication Critical patent/JPS58172973A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H02GENERATION; CONVERSION OR DISTRIBUTION OF ELECTRIC POWER
    • H02MAPPARATUS FOR CONVERSION BETWEEN AC AND AC, BETWEEN AC AND DC, OR BETWEEN DC AND DC, AND FOR USE WITH MAINS OR SIMILAR POWER SUPPLY SYSTEMS; CONVERSION OF DC OR AC INPUT POWER INTO SURGE OUTPUT POWER; CONTROL OR REGULATION THEREOF
    • H02M7/00Conversion of AC power input into DC power output; Conversion of DC power input into AC power output
    • H02M7/42Conversion of DC power input into AC power output without possibility of reversal
    • H02M7/44Conversion of DC power input into AC power output without possibility of reversal by static converters
    • H02M7/48Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode
    • H02M7/53Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal
    • H02M7/537Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters
    • H02M7/5387Conversion of DC power input into AC power output without possibility of reversal by static converters using discharge tubes with control electrode or semiconductor devices with control electrode using devices of a triode or transistor type requiring continuous application of a control signal using semiconductor devices only, e.g. single switched pulse inverters in a bridge configuration

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Inverter Devices (AREA)
  • Dc-Dc Converters (AREA)

Abstract

PURPOSE:To suppress the voltage fluctuation at no load or light load time by generating a no voltage period at a part of positive and negative half cycle period of voltage waveform which is generated from a rectangular inverter. CONSTITUTION:A gold bridge type inverter of single phase is constructed by transistors Q1-Q4. The transistors Q1, Q2 are alternately conducted by a base drive circuits (no-voltage period generator)B of the transistors Q1, Q2, and the transistors Q3, Q4 are alternately conducted in a similar manner by the base drive circuit B. The output voltage of the inverter has a period that does not generate a voltage at part of the period of 0-90 deg. of the positive and negative half periods.

Description

【発明の詳細な説明】 不発明ね画流高亀圧電源C:係り、特C二高周波矩形1
ンパータ出力を昇圧トランスに1って昇圧し、東ζ;整
蹄し1得らする面流高霜圧電istiiwt:関フるも
のである。
[Detailed description of the invention] Uninvented high voltage power supply C: related, special C 2 high frequency rectangle 1
The output of the converter is boosted by a step-up transformer, and the high-temperature voltage is obtained.

従来のこの種装置の1@を第1図に示″ltn第1図鑑
=おいてV INVは矩形波インバータ出力電圧、Tr
tj昇圧トランス、D□〜D、ね整流用ダづオード、C
o * Ro Fi (21ぞnスナバ用のコンデンサ
、抵抗、LF 、 CFII′i七jぞ1ン1hり用リ
アクトル、コンデンサである。LFのη)わり6二抵抗
を用いる場合もある。
A conventional device of this type is shown in Fig. 1, where V INV is the rectangular wave inverter output voltage, Tr
tj step-up transformer, D□~D, rectifier diode, C
o * Ro Fi (capacitor and resistor for 21mm snubber, LF, reactor and capacitor for CFII'i 7j 1h. LF's η) 62 resistors may be used in some cases.

昇圧トランスTrの鉄心量な減少させるために1ンバー
タの出力周波ha、通常100Hzρ1らIKHz程度
の値≦:選ばnる。j!、(:4ンパータ出力電圧波形
をや形波とすることにより、前述の1ンバ一タ周波数の
高周波化と合わせて、)1ルタも13%型化さjている
。ところが第1図(二示を装置≦:おいC−、無負荷晩
、或いは軽負荷輛に第2図(=示すよう力昇圧トランス
Trの2久111’l圧に数KHzの減涙振動が発生し
、特(二無負荷にね、(のビーク電圧は定格愉の2倍程
度1で跳細し、抛鮨の耐圧を脅かすと共C二、フ1ルタ
コンデンfCFをピーク光電ブる。この現象ね、トラン
スの洩j1ンダクタンスとストレイキャパシタンス(二
よる共振C二よる原因であり、そのT型等価回路な第3
図に示す。この第3図5=おいて、LT1+LT2り七
nぞ711次側蓋:換貢さjたT型等価回路での洩f′
11ンダクタンス勺、RTI−R’l’2す(1ぞ1T
型等価回路での抵抗力、Csねストレ1キャパシタンス
分である。
In order to reduce the iron core amount of the step-up transformer Tr, the output frequency ha of one inverter is usually selected from a value of about 100 Hz ρ1 to IKHz ≦: n. j! , (by making the output voltage waveform of the four-parter a circular wave, together with the above-mentioned increase in the one-parter frequency), one router has also been made into a 13% type. However, as shown in Fig. 1 (= device ≦: Hey C-, at night with no load, or in a lightly loaded vehicle, there is a vibration of several KHz at 111'l pressure of the power boost transformer Tr for 2 hours as shown in Fig. 2). This occurs, and especially when there is no load, the peak voltage of (2) jumps to about twice the rated value, threatening the withstand voltage of the capacitor, and causing a peak photovoltage of the filter capacitor (fCF). The phenomenon is caused by the leakage j1 inductance and stray capacitance of the transformer (resonance caused by C2), and its T-type equivalent circuit is the third
As shown in the figure. In this Figure 3, LT1 + LT2 is 7n.
11 inductance, RTI-R'l'2 (1 zo 1T
The resistance force in the type equivalent circuit is equivalent to one capacitance of Cs stress.

RECtjlI流回路を示し、第1図のE2(二相当ブ
る部分ね第3図で%(ロ)−記勺で表わしている。
The RECtjlI flow circuit is shown, and the portion corresponding to E2 (2) in FIG.

通常1次@数百■、2次@数10KVといった昇圧トラ
ンスTrね高圧側の巻款が非常(二多く力る穴めに、ス
トレイキャパシタンスが非常に大きくカリ、その共振周
波数に数KHz程度と力る。一方、前述のよう≦二1ン
パータの周ahね昇任トランスTriび(ニン1ルタの
/JN型化の目的で高周妓化名f′I″Cいるために、
共振周波叡と励振周波銀が、1旨 接近している。従って第3図に示したよう彦LCR山列
共振回路C二矩形肢電圧を印加した場合、第2図6=示
し7?jうに電圧E2に振動電圧が発生し、焦負荷楠(
二は、減良暑が最、J・に々るために、(の揚動が最も
大きく力る。
Normally, the windings on the high voltage side of the step-up transformer Tr, such as primary @ several hundred volts and secondary @ several tens of KV, are very large (due to the large holes, the stray capacitance is very large, and its resonant frequency is about several kHz). On the other hand, as mentioned above, in order to have a high circumcision name f'I''C for the purpose of converting Nin1ruta into a /JN type,
The resonance frequency and the excitation frequency are close to each other. Therefore, when the two rectangular limb voltages of the Hiko LCR mountain row resonant circuit C are applied as shown in FIG. 3, in FIG. 2, 6 = 7? An oscillating voltage is generated in the sea urchin voltage E2, and the
Second, in order to reduce heat and heat, the lift of (() exerts the greatest force.

本発明d、このようf!従従来置の欠泊を除去するため
に力場nた奄ので、極めχ簡単々構成(二より、上記従
来の欠陥である振動を抑制しfc面蒲高゛串圧11源装
置を提供することを目的とするものである。
This invention d, like this f! In order to eliminate the defects in the conventional equipment, a force field is used, so it has an extremely simple structure (Secondly, it suppresses the vibration, which is the defect of the above-mentioned conventional equipment, and provides an FC surface height skewer pressure source device. The purpose is to

以下第4図力いし、第8図を参照し、本発明の−実り例
を説明する。
Hereinafter, a practical example of the present invention will be explained with reference to FIG. 4 and FIG. 8.

第4図(a)ね第3図の等価回路を更(二簡略化した等
価回路であり、第4図(b)に示″f工つカインバータ
出力波形でこの回路を励振する場合を示している。°こ
の第4図(b)ね1ンパータ出力甫圧波形で、従来のよ
う力完全々矩形波とせずに、狭幅パルスと広幅パルスを
混合状態にした波形を特命とするものである。
Figure 4(a) is a simplified equivalent circuit of the equivalent circuit in Figure 3, and Figure 4(b) shows the case where this circuit is excited with the inverter output waveform. Figure 4 (b) shows the output pressure waveform of the N1 pump, which is specially designed to have a waveform that is a mixture of narrow-width pulses and wide-width pulses, instead of a completely square wave like the conventional one. be.

この狭幅パルスと広幅パルスを使用する理山を以下説明
する。、第4図(a)の回路ね振動的力tのとし、更に
ストレイトキャパシタンス分Csl:tj、逆億性でC
@Eの電荷を儒し又いたとする。今この回路に(1)ス
テップ電圧を印加した場合と、(11)第4図缶)に示
す工う彦狭幅パルスと広幅パルスの混合波形電圧を印加
した場合の(nぞnについて、コンデンサ電圧の変化を
調べてみる。このコンデンサ電圧なV c s (t)
とすると、上記(1)ステップ電圧の場合 但しく1)式において である。(11式でV c s (t)が最大になるの
ねβt=π・・・〔2)の鴫であり、(の[は Vcs(t)max=E(1+2e−7K)  −13
1次C二上記(11)の場合、第4図の狭幅パルスと広
幅パルスの混合波形を示す第4図(b)il1次の式で
衣わさjる〇 十邸βt)・・・(4) 但しく4)式におい又 (社)βto)・・・(5) (1)のステップ電圧の場合と同様に、Vcs(t)が
最大に々るのねβt=π・・・(6)の鮪であり、(の
ilに(7)式の如く々る。
The method of using narrow pulses and wide pulses will be explained below. , the circuit of Fig. 4(a) is assumed to have an oscillatory force t, and furthermore, the straight capacitance Csl:tj, and the inverse polarity C
Suppose that the charge of @E is changed. Now, when (1) a step voltage is applied to this circuit, and (11) a mixed waveform voltage of a narrow width pulse and a wide pulse shown in Fig. 4 is applied (with respect to the capacitor Let's examine the change in voltage.This capacitor voltage V c s (t)
In the case of step voltage (1) above, however, in equation 1). (Vcs(t)max=E(1+2e-7K)-13 in Equation 11, βt=π...[2)
In the case of (11) above, Fig. 4 (b) showing the mixed waveform of the narrow-width pulse and wide-width pulse shown in Fig. 4 is expressed by the following equation. (4) However, in formula 4), βt = π... (5) As in the case of step voltage in (1), Vcs(t) reaches the maximum value βt = π... It is the tuna in (6), and the il of (is similar to the formula (7)).

α V c s(t)max=E+(E−Vc s (to
 ) ) ・e  β・・・(7) 上述の(31式と(1)式を比較すると理解できるよう
に、(3;式でね回路定数によつχ戴大慣ね完全5二現
定6tするが(7)式におい”ch、Vca(to)キ
Eと々る工うに、to’j設% tnば、V c s 
(K )maxキEとカリ%振@に殆んど発生し々く力
る。第5図の故形図(a) 、 (b)に、(1ぞn上
記(1)ステップ電圧の場合(従来装置)と(’Ii)
の伏、広パルスの混合電圧の場合(本発明装置)に対応
ブるコンデンサ傘圧、Vcs(t)蛋び(=1ンバーク
出力電圧VINV(t))ヒ 示”−一゛ 。
α V c s (t) max=E+(E−Vc s (to
) ) ・e β...(7) As can be understood by comparing equation (31) and equation (1) above, in equation (3), χ dai is a perfect 5-two definition depending on the circuit constant. 6t, but the formula (7) is "ch, Vca (to) key E, to'j set% tn, V c s
(K) Most of the force occurs at max key E and potash % vibration @. The failure diagrams (a) and (b) in Figure 5 show (1) (1) step voltage case (conventional device) and ('Ii).
In addition, the capacitor umbrella pressure, Vcs(t), and voltage (=1 inverter output voltage VINV(t)) corresponding to the case of wide pulse mixed voltage (device of the present invention) are shown below.

次に本発明の狭幅パルスと広幅パルスの混合的々電圧波
形を発生させる1ンパータの動作波形原理について第6
図、第7図を用いて以下説明する。
Next, the sixth section describes the operating waveform principle of the one-parter that generates a mixed voltage waveform of narrow-width pulses and wide-width pulses according to the present invention.
This will be explained below using FIG.

第6図の′Ila槃回路において%Q1〜Q、ねトラン
ジスタであり、EIJ山流塵圧、VINV t:lイン
バータの出力重圧である。トランジスタQ□〜Q。
In the 'Ila' circuit of FIG. 6, %Q1 to Q are transistors, EIJ mountain flow dust pressure, and VINV t:l are the output pressure of the inverter. Transistor Q□~Q.

により単相の全ブリッジ形1ンバータ′5L構成し1い
る0い1、トランジスタQ1.Q2tベースの駆動回路
(無電圧期間発生器)Bにより交互に導通させると、E
Aとして第7図EAに示した電圧波形が得らn、同様に
トランジスタQ、IQ、をベースの駆動回路Bにエリ交
互に導通させるとEBが得らする。EB@、っ1リトラ
ンジスタQ5゜Q、の導通期間を不等間隔とし、第7図
c二外すよう力板形と−jt’lば、1ンパータ出力電
圧VINVねEムーEBとして得ることができる。第6
図の回路(ニエ1ば、トランジスタのペース回路の波形
を制#)ることにより、容易に所望の1ンパータ出力電
圧を得ることができるし、トランジスタQ1〜Q、とし
てサイリスタやGTQftどな用いても同様の1ンバー
タ出力電圧波形を祷ることね容易≦二類推できる。また
第7図の波形(=示′を様≦二、1間を設けたことが大
き力特徴である。
A single-phase full bridge type 1 inverter '5L is constructed by 1, 0, 1, and transistor Q1. When Q2t-based drive circuit (no-voltage period generator) B conducts alternately, E
A voltage waveform shown in FIG. 7EA is obtained as A, and similarly, EB is obtained when transistors Q and IQ are alternately made conductive to the base drive circuit B. If the conduction period of the transistor Q5゜Q is set at unequal intervals, and if the conduction period of the transistor Q5゜Q is made into a force plate type as shown in Fig. can. 6th
By controlling the waveform of the pace circuit of the transistors in the circuit shown in the figure (controlling the waveform of the pace circuit of transistors Q1), it is possible to easily obtain the desired output voltage of the 1-amperter. Assuming a similar one inverter output voltage waveform, it is easy to infer that ≦2. Another major feature is that the waveform shown in FIG.

第8図ね本発明によるインバータを用いた面流烏亀圧電
源装置の構成図である。この第8図において、回流電圧
Eが1ンバータ(二供給されると、上記第6図で畦述し
たように昇圧トランスTrの入力に第5図(b)で示′
を工う々狭幅パルス電圧と広−パルス電圧が供給さnる
。従つ又この第6図(b)の波形電圧は外圧トランスT
rの二次@j(:接続さjたダ1オートD1f2いしり
、により整亦さn1史に)1ルタ用リアクトルLF、コ
ンデンサCFCニエリ平滑さn″′C′C所望出力Eo
が得らする。
FIG. 8 is a configuration diagram of a surface flow power supply device using an inverter according to the present invention. In this FIG. 8, when the circulating voltage E is supplied to one inverter (two inverters), the input voltage of the step-up transformer Tr is shown as shown in FIG.
In effect, a narrow pulse voltage and a wide pulse voltage are supplied. Accordingly, the waveform voltage in FIG. 6(b) is the external pressure transformer T.
r's quadratic @j (: connected j 1 auto D1 f2 input, so that the order is n1 history) 1 reactor LF, capacitor CFC Nielly smoothness n'''C'C desired output Eo
will get it.

以上記載の工うC、本発明によjば、1ンバータ出力鼓
形の簡単々改良にエリ、無負荷部、或いね軽負fi鴫の
゛電圧蚕動奮大暢に抑制ブることか司iであり、電子ピ
ー、、ム溶接機の加速電源力と(二通用するとヤの利漬
り極めて大であり、/J・型で高性b’t々−源装置と
力る。
According to the above-mentioned method, according to the present invention, it is possible to easily improve the output drum shape of one inverter, and to suppress the voltage fluctuation of the no-load section or the light load section. It is an electric power source, and the accelerating power source of an electronic P/M welding machine (if used twice, the damage is extremely large, and the /J type is used as a high-performance B't power source device).

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は従来の向流高電圧電源装置の構成図、第2図は
第1図の名部の動作波形図、第3図は第2図の動作波形
を説明するための等価回路図、第4図ね本発明の詳細な
説明するための等価回路図(a)と波形図(b)、第5
図は本発明の効果を従来例と比較した波形図、第6図d
本発明による1ンバータの原理図、第7図は第6図の動
作波形図、第8図は本発明(=よる1ンバータを用いた
山流崗′電圧電源装置の構成図であるO Q1〜Q、・・・トランジスタ、B・・・無電圧期間発
生器・VINY・・・1ンバータ出力電圧波形、Tr・
・・昇圧トランス、D1〜D、・・・夕づi−)、Co
。 Ro・・・−f:、1ぞnスナバ−用コンデンサ、抵抗
、LF。 CF・・・71ルタ用リアクトル、コンデン?、LT1
+LT2・・・(1ぞ1トランスのT型等価回路の%1
f14ンダクタンス’RT1’RT2・・・(jぞnト
ランスのT型等価回路の抵抗力、C11・・・トランス
のT型等1曲回路におけるストレ1キャパシタンス、R
EC・・・整流回路、Vcs・・・ トランスのT型等
価回路砿;おけるストレ1キャパシタンスの電圧oft
お・図中向−府月ね同−又ね相尚部勿を示す。 代理人   葛 野 信 −(e含か1名)第 / 謂 li: 第3 図 茶4 図 第0図 第 6 図 第 7 図 手続補正書(方式) 特許庁長官殿 1、事件の表示    特願昭 57−155721号
2、発明の名称 直流嵩電圧電源装置 3、 補正をする者 事件との関係   特許出願人 住 所     東京都千代田区丸の内二丁目2番3号
名 称<601)   三菱電機株式会社代表者片山仁
八部 4、代理人 住 所     東京都千代田区丸の内二丁目2番35
′i7/  ・ / 7ン 5、補正命令の日付 昭和57年7月27日(発送) 6、補正の対象 図  拘 7、 補正の内容 第8図を別紙の通り補正する。 8、 添付書類の目録 補正後のw48図を記載した書面  1通第  8  
図 特許庁長官殿 l ・扛件の表示    特願昭57−55721号2
、 5a 明rJ) Rf’j    硼流高電圧電s
ii雪3 ン山ILをする者 事件との関係   特許出η(j人 代表者片由仁へ部 4、代理人 5o  補正の対象 明細書の発明の詳細な説明の欄 6 補正の内容 +11明細書第3頁第2朽(:「共振による原因であり
」とあるのを「共振が原因であり」と補正する。 (21明細書第7頁第18省4: r G T Q J
とあるのをrGTOJと補正する。
FIG. 1 is a configuration diagram of a conventional countercurrent high voltage power supply device, FIG. 2 is an operating waveform diagram of the main part of FIG. 1, and FIG. 3 is an equivalent circuit diagram for explaining the operating waveforms of FIG. 2. Figure 4: Equivalent circuit diagram (a) and waveform diagram (b) for detailed explanation of the present invention;
The figure is a waveform diagram comparing the effects of the present invention with the conventional example, Figure 6 d
7 is a diagram of the operating waveforms of FIG. 6, and FIG. 8 is a block diagram of a voltage power supply device using a single inverter according to the present invention. Q,...transistor, B...no-voltage period generator, VINY...1 inverter output voltage waveform, Tr...
・Step-up transformer, D1~D, ・Yuzu i-), Co
. Ro...-f:, 1 n snubber capacitor, resistor, LF. Reactor for CF...71 Ruta, condenser? ,LT1
+LT2...(1 = 1 transformer T-type equivalent circuit %1
f14 inductance 'RT1' RT2... (j) Resistance of T-type equivalent circuit of n transformer, C11... Strain 1 capacitance in one-track circuit such as T-type of transformer, R
EC... Rectifier circuit, Vcs... T-type equivalent circuit of transformer; voltage of strain 1 capacitance in
O-Figure Nakamukai - Futsuki Nedo - Matane Sonaobe Naru. Agent Makoto Kuzuno - (1 person including e) No./Li: Figure 3, Tea 4, Figure 0, Figure 6, Figure 7, Written amendment to the procedure (method) Mr. Commissioner of the Japan Patent Office 1, Indication of the case, Patent application No. 57-155721 2, Name of the invention DC bulk voltage power supply device 3, Relationship to the case of the person making the amendment Patent applicant address 2-2-3 Marunouchi, Chiyoda-ku, Tokyo Name <601) Mitsubishi Electric Corporation Representative: Hitoshi Katayama 4, Agent address: 2-2-35 Marunouchi, Chiyoda-ku, Tokyo
'i7/ ・ / 7 5. Date of amendment order: July 27, 1982 (shipped) 6. Figures subject to amendment 7. Contents of amendment Figure 8 will be amended as shown in the attached sheet. 8. Document containing revised W48 diagram of attached documents 1st copy No. 8
Figure Commissioner of the Patent Office l ・Indication of the subject Patent Application No. 57-55721 2
, 5a Akira rJ) Rf'j High voltage current s
ii Yuki 3 Relationship with the case of a person who engages in IL work Patent issuer η (J Representative Katayuni Department 4, Agent 5o Column 6 Detailed explanation of the invention in the specification subject to amendment 6 Contents of amendment + 11 Specification Page 3, No. 2 (: "The cause is due to resonance" is corrected to "The cause is resonance." (21 Specification, Page 7, Section 18, Section 4: r G T Q J
Correct it to rGTOJ.

Claims (2)

【特許請求の範囲】[Claims] (1)矩形波1ンバータより矩形波が供給さnる昇圧ト
ランスの出力aζ二整流蛎装が設けらT1*m流高電圧
電源装置においχ、上記昇圧トランスが有するり、C共
振回路の影響を少々くするために、上記矩形波1ンバー
タが発生する電圧波形の止。 l1l(:無電圧期間を発生器せる無電圧期間発生fi
を設は大ことを特命とする画流高電圧電m装置。
(1) Output of a step-up transformer to which a rectangular wave is supplied from a rectangular inverter (a) In a T1*m-flow high-voltage power supply device equipped with two rectifiers, χ, the step-up transformer has the influence of the C resonant circuit. In order to reduce the voltage a little, the voltage waveform generated by the above rectangular wave 1 inverter is stopped. l1l (: No-voltage period generation fi
The installation is a high-voltage electrical equipment with a special mission.
(2)上記無電圧期間発生器の出力ね狭幅電圧パルスと
広幅電圧パルスと交互に発生する駆動回路を備えた特許
Ii1求の勅囲第1項記載のI流高亀圧電源装置。
(2) The I-flow high voltage power supply device described in Paragraph 1 of the Rescript of Patent Ii1, comprising a drive circuit that alternately generates narrow voltage pulses and wide voltage pulses from the output of the no-voltage period generator.
JP57055721A 1982-04-01 1982-04-01 Dc high voltage power source Pending JPS58172973A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57055721A JPS58172973A (en) 1982-04-01 1982-04-01 Dc high voltage power source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57055721A JPS58172973A (en) 1982-04-01 1982-04-01 Dc high voltage power source

Publications (1)

Publication Number Publication Date
JPS58172973A true JPS58172973A (en) 1983-10-11

Family

ID=13006724

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57055721A Pending JPS58172973A (en) 1982-04-01 1982-04-01 Dc high voltage power source

Country Status (1)

Country Link
JP (1) JPS58172973A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62166767A (en) * 1986-01-16 1987-07-23 Hitachi Medical Corp Power supply circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62166767A (en) * 1986-01-16 1987-07-23 Hitachi Medical Corp Power supply circuit

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