JPS58156239A - Broken line compression/expansion circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a PCM signal recording or transmission system.
This invention relates to a circuit that compresses and expands cough eccentricity.

Various methods have been proposed for compressing and expanding PCM signals, but generally a broken wire method is used, which is easy to design and has a simple circuit.

FIG. 111 is a configuration diagram of the compression circuit in the case of the five-fold line, and FIG. 3 is a compression characteristic diagram. In FIG. 1, 6 is a shift register, 46 and 47 are level comparators, and 48 is a decoder.

In such a configuration, the most significant sign bit of the digital data applied to the input terminal 1 is outputted as is to the output terminal 2 through the line 51. The remaining lower bits are input to shift register 6 and level comparators 46 and 47. The level comparators 4447K each have a range (1
) and the boundary value of range (2) and the boundary value of range (2) and range (53) are given, and the magnitude of each value and the input data is determined.Then, the output is sent to the decoder 48. By passing the range bit, you get the range bit that indicates which range the input data is in. Range bit.

The bit is output from the range bit output terminal 5.

Furthermore, the range bit is given to the shift register 6,
Shifts the input data according to the range and truncates the lower bits. When expanding, use the above range bit,
This is done by shifting in the opposite way to truncation. Note that in a general shift register, a left shift is performed for compression, and a right shift is performed for expansion.

In these six conventional methods, there are cases where the output is the same but the input is different, that is, the input signal and the compressed signal do not correspond one-to-one.In this case, it is necessary to establish the input signal for a certain compressed signal. In order to correct this, a separate range bit is provided to store the range of the input data.

However, with this method, a large number of range bits are required when performing complicated polygonal line compression, and the switching point of the polygonal line is determined if all data is to be used efficiently. These points become issues when recording or transmitting data with as little capacity as possible.

SUMMARY OF THE INVENTION An object of the present invention is to eliminate the drawbacks of the prior art described above and to provide a polygonal compression/expansion circuit that can efficiently record or transmit complex polygonal compression/expansion with a small capacity.

The present invention provides an offset to the compressed data so that the compressed data has a one-to-one correspondence with the input, and efficiently performs polygonal compression/expansion without using range bits.

Hereinafter, an embodiment of the present invention will be described in which 14-bit data is compressed into 15-bit data using a 5-fold line. Figure 2 is a block diagram showing an embodiment of the present invention, and Figure '84 is its compression characteristic diagram. In FIG. 2, 7 is an adder, and 11 is a memory circuit (ROM).Next, the operation thereof will be explained. In FIG. 2, shift register 6 and level comparison @4447 decoder 48
These parts operate in the same way as the circuit in figure g1. The adder 6 is for adding an offset amount according to the range stored in the ROMjl to the data. - Table 1 shows examples of compression. However, in Table 1, the sign bit is ignored.

(The following is a margin) By appropriately selecting the offset amount (in the embodiment, fi Q, 512.2048), the compressed data is made to be continuous. This amount of offset changes as the boundary of the broken line changes. Data shifting and offset addition are performed using the conversion formula shown in Table 1. If it is determined that the input data is in range (1), it is output as is. If it is determined that it is in range (2), shift the input data by 1 bit, truncate the least significant bit, and further offset) ' 51
Add 2. and output. If it is determined that it is in range (3), the input data is shifted by 2 bits, the lower 2 bits are truncated, and the offset, )@2048 is added and output. In the case of expansion, the opposite operation can be performed. That is, offset subtraction and data shift (in the opposite direction to compression) may be performed.

In this way, since there is a one-to-one correspondence between the input data and the compressed data, there is no need for a range bit, and the edge switching point can be set arbitrarily.

As described above, the present invention does not require the use of range bits, can arbitrarily set the switching point of the broken line, and can efficiently compress data.

[Brief explanation of drawings]

FIG. 1 is a block diagram showing a conventional embodiment, FIG. 2 is a block diagram of a broken line compression circuit showing an embodiment of the present invention, FIG. 3 is a compression characteristic diagram of a conventional broken line companding method, and FIG. 0 which is a compression characteristic diagram of the broken line companding method of the present invention 5...Shift register 47...Level comparator 9...Adder 10...Memory circuit (ROM)゛%-1 Sugar 1 closed 1'<t mJAz diagram

Claims (1)

[Claims] In a digital compression/expansion circuit that compresses a signal with quantization bits into bits, transmits it, and expands it again into a signal with bits during demodulation, multiple level comparisons are performed to compare the input signal with the boundary value of the broken line. a decoder that determines which range the input signal is in according to the output of the cough level comparator; a shift register that bit-shifts the input signal according to the range determined by the decoder; The linear compression/expansion circuit is characterized by comprising means for adding an offset to the output signal of the shift register so that the compressed data becomes continuous during compression and subtracting the offset during expansion according to the determined range.