JPS58143566A - Semiconductor device and manufacture thereof - Google Patents

Abstract

PURPOSE:To obtain the semiconductor device having the desired high resistance film and the resistance type wiring to be used for said high resistance film by a method wherein a part of the high resistance polysilicon film provided on an insulating layer is left in the original state and used as a resistance part, the other part is brought into a metal silicide state and used as a wiring part. CONSTITUTION:A field SiO2 layer 2 is grown on one main surface of a P type silicon substrate 1, a load resistor 3 (R1 and R2) and its wiring 4 are provided on said SiO2 layer 2. The wiring 4 is directly connected to the N<+> type drain region 5 of the FETQ1 or Q2 which was formed on the substrate 1. The load resistor 3 consists of high resistance polysilicon, and the wiring 4 and a gate 4a are composed of low resistance metal silicide of 10-20OMEGA/? or thereabout in sheet resistance. According to this constitution, the working speed of the device is greatly increased by the gate and its wiring which are brought into a low resistance state, and on the other hand, as a high resistance part 3 is arranged on the metal silicide wiring 4, which is different from the structure heretofore in use, thereby enabling the high resistance part 3 to coexist when the silicide gate method is performed.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a device suitable for a memory cell of a static RAM having a conductor box, a gate electrode made of metal silicide and its arrangement on the back, and a method for manufacturing the same. .

In this food static RAM memory cell &c,
The inverter circuit may be made of t-*X MX 8w PI T gate, its noble resistor, and t-polysilicon. In this case, the gate and the number 7 are not #l1Ill
while making it tt anti-polysilicon by doping with
The negative resistance portion can be made of undoped non-doped polysilicon. That is, part 8 of the polysilicon knitting formed in a predetermined pattern serves as a resistance.
10 Discipline yourself and don't wear polysilicon other than this mask.
All you have to do is make wrg happy.

The gate of the sixth V FX gate and its arrangement V M O8L s, Wljil, where Niro can reach the operation of the memory.
If the bone metal silinide is related to II, disembarked J
It turns out that it is not possible to create a high-resistance load resistor r by doping with impurity Lft.

The present invention provides a device for selectively silicided high resistance polysilicon to provide a desired high resistance film and its low resistance distribution under such circumstances. The purpose of the present invention is to provide a method for producing a self-line method with good dust repellency.

Hereinafter, the present invention i static R*m [ji Lm actual at
jl? The drawings will be described in detail.

I would like to congratulate the static RAM in this article, especially the memory cell section, by using the value circuit shown in FIG. This memory cell is connected in series between the load resistors R and RIr, respectively, and connected to a pair of inverter circuits consisting of a 7tm motor 8@FNTQ, +Q1, and the output voltage V is connected to the 7tm motor 8@FNTQ, +Q1. Configure and exit 7t4. F
ITQ, - inverter output μ transmission game) m no uI8fJJ? 1TQsk valve and data DK,
17jFKTQ, - inverter output is MIEI type 11〒Q4? for transformer in-gate. The data #DK is being monitored via the data #DK. In other words, the Toshin Numissi Explosion Gate is used as the ninth addressing means to control the information transmission between the above-mentioned flimb 7c1 as an information distributor and the complementary data line pair D-D, and its operation is based on the word iiW[Controlled by the applied address signal.

In such a memory cell part, what about v44a? and R, respectively, are arranged between the electric wire (1) and each of the diffusion regions of FICT0 Q+ and Qs by the wiring -1. Ko\de 1
The thing is that the load resistance R, and RYE recursive [A &
Made of anti-polysilicon, tL and 4C are connected in series 7
This is because the gates of tk, ll1, and Fl; TQ, and XQ are made of low-resistance metal silicide. #I
As shown in Figure 2, the P-type cylindrical saw 7 bases 1 king side 1c field atO, pigeon 2 grows n, this 0s.
The load resistance 3 (Ft,
and Rs), and its distribution 4 (required), of which 4 or fl was formed?J!TQ, the father is ql's N" excitation drain pattern 5K is connected by tie left contact method. In addition, 8FiN IIJ7-: 51ol as a mask for
, 9 is made of phosphorus silicate galanium, and IO is made of aluminum.

The resistor 3 is made of polysilicon with a sheet resistance of toeΩ/lo, and the resistor 4 and the resistor 4a are made of vertical low-resistance metal silinide with a sheet resistance of 10 to 2 oΩ/low. With this structure, the resistance of the gate and the interconnection 7 is reduced, so that the operating variation t is significantly reduced. Because resistance Zheng 1 is arranged,
In the silicide gate system, the Il[I resistor section 3 can coexist.

Next, the method for creating the kite 2-0m will be explained.

Like the 3rd grade oil, the base plate 10 - oxidized with Kochi's selective oxidation technology and 5iIN as a mask.

810° 411
A mask 12 is formed on the portion that will become the gate.

Next, as shown in FIG. 3B, 810 m1 other than the mask 12
[11t:c is removed by etching, and an N+g source region 6 and drain region 5 are formed by expanding M# impurities, such as phosphorus, from this m-1i: portion,
'IK B i Os II L l (D -4a
After k removal B L9, high resistance polysilicon l1I on all rki
Illsk conversion gas phase gs method (OVD) f4 sooo
Xm degree rc analysis mg.

Next, as in No. 30 (2), the polysilicon Al13 is patterned into a uniform shape by photo-etching on the chest, and the polysilicon #1A1 which becomes the ym'ro gate is formed.
3a to 5 This is followed by a load resistor of polysilicon l513b and a T-shaped station.

Next, as shown in FIG.
Stand by with 01-. This mask 8 is covered with photoresin on the 11th side, and the surface of polysilicon 5ttabi is oxidized.
Il! It can be formed by patterning this surface by etching.

Next, as shown in the figure, a metal layer 15TIr that easily reacts with silicon is formed on the entire surface by vapor deposition. This metal layer u,
It may be made of Ti, PtXMQ, W, etc.

Then during H1 father tlAr? ”, goo ~tioo c
't' heat treatment (sintering) causes the metal layer 15 and the silicon below it to react. Since this M, the number of metal layers on @3 PIN number [, 810, 2, lL & 8 is 810. Polysilicon 13a and 13 remain as metallurgical substances because they do not react with polysilicon 13a and 13.
The reactive gold II4 on b reacts with the polysilicon and silicides the polysilicon. Therefore, the portion b where the reactive metal is directly attached to the polysilicon is metal silicide.
The number is 4m, and a is the number of layers of IIk.

Add the above metal etching solution and crush it.

-z, it The polysilicon 3 under @#lI414 is hardly silicided, and is left as a high-resistance polysilicon of the tile. This polysilicon l[31H (iE) is used as a low-resistance wL material to provide low-resistance wiring to silicide-4.

Next, as shown in Figure 3H, after depositing phosphosilicate glass over the entire surface using 9YtOVD, photoresist 1
-Enjoy the F9T fixed pattern. To this #L, as a photoresist 111 mask) base glass i [II9, *
WC8L Os k error f 7 / te removal it,, contact hole r for aluminum electric imw* in Fig. 2
form respectively. Then, it was vapor deposited on the entire aluminum surface and patterned by etching to form each @* and arm plate as shown in Figure 2.

As is clear from the royal authority explained above, in this method, silicide goo) 4a and hai-4, shellfish resistance post 3 and t
The 3D diagrams to Figures 3G and 4C can be connected in series with a self-line (self-placement stand), and in the silicide gate method, the A resistance polysilicon load resistor can be easily reused with good dust resistance. can be formed. In addition, it is better to set B L O * $18 i'j on the load resistance to -1 Vcm as described above, but is this t'L an impurity from the glass #s9 to the resistor part 3? This is because (17) is effectively prevented from being doped.

As mentioned above, whether water is used in the present invention or not, the above-mentioned implementation method is the r of the present invention.
- The rudder is a glossy transformation based on the technical idea of b].

For example, the above-mentioned method of manufacturing the memory cell and its structure may be changed. Since the silicide layer 4 is in direct contact with the N1 boiling region 5, it is possible to -gi11f
! Te6ru. C1L [II, JI3wA [Ike's method can also be adopted as it is just one method for the royal power mentioned above]9,
Alternatively, the ion implantation method may be used to form polysilicon 13a and 13Th masks into the source and drain regions of type IIx. Note that the present invention may be applied to resistors used in areas other than the above-mentioned memory cell portion.

As mentioned above, in the present invention, a part of the high-resistance polysilicon film is directly used as a high-resistance part! 51, and the others are metal silicided and used as interconnections, so devices that coexist with silicide interconnections and polysilicon resistors.
I can provide. Furthermore, since they are formed by a selective reaction of polysilicon-4EJr% using a mask, they can be easily produced using a self-line method without causing dust.

[Brief explanation of the drawing]

Figure rkJ shows the actual model of the present invention, and the 11th
1! ! An equivalent circuit diagram of the memory cell section of the JTF static RAM, Figure 7A2 shows the drive FI in the memory cell section.
wrdIJ diagram showing T and negative bamboo resistance, Figure 3A ~ Series 3
The construction method of the structure of Figure 2 of H Diagram Stile Sheet 2 is shown in the construction right face V corner diagram. In addition, the symbol ν used in the drawing is 3(li
*R*) is III Xiongchiangzheng, 4(7) is Silicide a'#fls, BHsto, discipline, 13.13m and 1
3b is a polysilicon material, and 15 is a reactive metal. Figure 1

Claims (1)

[Claims] 1 semiconductor t+4. An insulator layer is provided on top of u, and a part of the 7tIII+resistance polysilicon layer is left on the 7tIII+resistance polysilicon casing and used as a resistor layer, and the other part is used as a resistance layer. This is a conductor that is known for being made into metal silicide and used as a wiring part. 2. The right to form an insulating tube pIII on the conductor A body,
This II! +16 resistance polysilicon on the a1gI layer - 1 root formed in a predetermined pattern, a knee formed with a mask for 1 m of resistance among this polysilicon layer, and a reaction to a Bonyama containing polysilicon. One step is to attach a reactive metal, and the other is to convert the polysilicon IIRk which is not covered by the mask into a metal silinide by heat treatment Ik (as opposed to a reactive metal).
However, in addition to the IUile manuk upper mass, the metal kwfi 6, which is cooked without silicidation on the upper mass, and the hair of the metal kwfi 6, is to be made into a large size.