JPS58138370U - LSI package spacer - Google Patents

LSI package spacer

Info

Publication number
JPS58138370U
JPS58138370U JP3392482U JP3392482U JPS58138370U JP S58138370 U JPS58138370 U JP S58138370U JP 3392482 U JP3392482 U JP 3392482U JP 3392482 U JP3392482 U JP 3392482U JP S58138370 U JPS58138370 U JP S58138370U
Authority
JP
Japan
Prior art keywords
lsi package
lsi
spacer
plate
package spacer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP3392482U
Other languages
Japanese (ja)
Inventor
俊夫 今井
敏之 中尾
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP3392482U priority Critical patent/JPS58138370U/en
Publication of JPS58138370U publication Critical patent/JPS58138370U/en
Pending legal-status Critical Current

Links

Landscapes

  • Tests Of Electronic Circuits (AREA)
  • Structures For Mounting Electric Components On Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【図面の簡単な説明】[Brief explanation of drawings]

第１図はＬＳＩの上面図、第２図は従来の方法によるＬ
ＳＩのプリント基板への実装図、第３図は本考案による
スペーサの上面図、第４図は第３図の側面図、第５図は
本考案の一実施例の側面図である。 ｌ・・・ＬＳＩ、　２・・・外側端子、３・・・内側端
子、４・・・プリント基板、５・・・半田、６・・・プ
リント基板またはフレキシブルプリント板、７・・・外
側端子用引出し配線、８・・・内側端子用引出し配線、
９・・・孔。Figure 1 is a top view of the LSI, Figure 2 is the LSI according to the conventional method.
FIG. 3 is a top view of a spacer according to the present invention, FIG. 4 is a side view of FIG. 3, and FIG. 5 is a side view of an embodiment of the present invention. l...LSI, 2...outer terminal, 3...inner terminal, 4...printed circuit board, 5...solder, 6...printed circuit board or flexible printed board, 7...outer terminal Pull-out wiring for 8... Pull-out wiring for inner terminals,
9...hole.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 半田付面に垂直方向に配置された信号引出し端子を有す
る多ピンＬＳＩパッケージにおいて、該ＬＳＩの信号端
子と電気的に接続可能な溝孔番有し、この信号端子孔か
ら端面まで引出しｉ線を施した板状スペーサをＬＳＩパ
ッケージとＬＳＩパッケージを搭載する基板の間に実装
することから成り、゛ＬＳＩパッケージの上面に信号端
子を持たないＬＳＩパッケージの信号観測を板状スペー
サの端面の信号端子で信号観測できることを特徴とする
ＬＳＩパッケージスペーサ。In a multi-pin LSI package that has signal lead-out terminals arranged perpendicularly to the soldering surface, there is a slot number that can be electrically connected to the signal terminal of the LSI, and an i-line is drawn out from this signal terminal hole to the end face. This method consists of mounting a plate-shaped spacer with a plate-shaped spacer between the LSI package and the board on which the LSI package is mounted. An LSI package spacer that allows signal observation.
JP3392482U 1982-03-12 1982-03-12 LSI package spacer Pending JPS58138370U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP3392482U JPS58138370U (en) 1982-03-12 1982-03-12 LSI package spacer

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP3392482U JPS58138370U (en) 1982-03-12 1982-03-12 LSI package spacer

Publications (1)

Publication Number Publication Date
JPS58138370U true JPS58138370U (en) 1983-09-17

Family

ID=30045448

Family Applications (1)

Application Number Title Priority Date Filing Date
JP3392482U Pending JPS58138370U (en) 1982-03-12 1982-03-12 LSI package spacer

Country Status (1)

Country Link
JP (1) JPS58138370U (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015050423A (en) * 2013-09-04 2015-03-16 三菱電機株式会社 Semiconductor device and flexible circuit board

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015050423A (en) * 2013-09-04 2015-03-16 三菱電機株式会社 Semiconductor device and flexible circuit board

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