JPS5813021A - High-speed switch circuit - Google Patents

High-speed switch circuit

Info

Publication number
JPS5813021A
JPS5813021A JP56110668A JP11066881A JPS5813021A JP S5813021 A JPS5813021 A JP S5813021A JP 56110668 A JP56110668 A JP 56110668A JP 11066881 A JP11066881 A JP 11066881A JP S5813021 A JPS5813021 A JP S5813021A
Authority
JP
Japan
Prior art keywords
transistor
load
transformer
switch circuit
control circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56110668A
Other languages
Japanese (ja)
Inventor
Mutsumasa Hosono
細野 睦正
Mutsuhiro Matsuda
松田 睦宏
Yasuhisa Nagai
永井 康久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Technical Research and Development Institute of Japan Defence Agency
Original Assignee
Technical Research and Development Institute of Japan Defence Agency
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Technical Research and Development Institute of Japan Defence Agency filed Critical Technical Research and Development Institute of Japan Defence Agency
Priority to JP56110668A priority Critical patent/JPS5813021A/en
Publication of JPS5813021A publication Critical patent/JPS5813021A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H03ELECTRONIC CIRCUITRY
    • H03KPULSE TECHNIQUE
    • H03K17/00Electronic switching or gating, i.e. not by contact-making and –breaking
    • H03K17/51Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used
    • H03K17/56Electronic switching or gating, i.e. not by contact-making and –breaking characterised by the components used by the use, as active elements, of semiconductor devices
    • H03K17/567Circuits characterised by the use of more than one type of semiconductor device, e.g. BIMOS, composite devices such as IGBT

Abstract

PURPOSE:To switch voltages to a load at high speed by connecting a fast rising transistor (TR) in parallel to a switch element for short-circuiting the load, and turning on this TR in the beginning of signal application. CONSTITUTION:A signal from a control circuit 18 is applied through a transformer 7 to a rectifying circuit 6, which drives a bipolar TR3. The signal from the control circuit 18 is applied through a transformer 21 to a fast rising TR19, which is turned on. The TR19 is turned on continuously until the TR3 is turned on. Thus, voltages to a load 4 are switched at high speed.

Description

【発明の詳細な説明】 この発明は直流的な絶縁が必要でか つ、゛負荷の電圧を高速に切替えるスイッチ回路に関す
るものである。
DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a switch circuit that requires DC insulation and that switches the voltage of a load at high speed.

直流的な絶縁を必要とするスイッチ 回路として、従来第1図に示すものが あった。図において+11は電源、12)は保護抵抗、
(8)はバイポーラ型のトランジスタ、(4)は負荷、
(5)はベース制限抵抗、(6)は整流回路であり以上
によってスイッチ回路部分を構成する。(71はトラン
ス、(8)は制御回路である。制御回路(81とスイッ
チ回路部分はトランス17)で直流的な絶縁がなされて
いる。
A conventional switch circuit that requires direct current insulation is shown in FIG. In the figure, +11 is the power supply, 12) is the protection resistor,
(8) is a bipolar transistor, (4) is a load,
(5) is a base limiting resistor, (6) is a rectifier circuit, and these constitute a switch circuit portion. (71 is a transformer, and (8) is a control circuit. The control circuit (81 and the switch circuit portion are connected to the transformer 17) for DC insulation.

次に動作について説明する。トラン ジスタ(8)がオフのときは電源(1)の出力電圧がほ
とんど負荷(4)に印加されている。次に入力信号が制
御回路(8)に入ると、M1m回路(8)はDQ/DC
コンバータと同じ方式でトランス(7)に交互の電流が
流れるように発振を行う。この時、ト ランス(7)の2次側には第2図で示されるような電流
が流れる。これを整流回 路(6)に通すことにより第3図のような電流がトラン
ジスタ(3)のベース電流として流れる。このベース電
流によって トランジスタ181が導通して負荷(4)の両端が短絡
され負荷電圧は零となる。
Next, the operation will be explained. When the transistor (8) is off, most of the output voltage of the power supply (1) is applied to the load (4). Next, when the input signal enters the control circuit (8), the M1m circuit (8)
Oscillation is performed so that alternate currents flow through the transformer (7) in the same manner as the converter. At this time, a current as shown in FIG. 2 flows through the secondary side of the transformer (7). By passing this through the rectifier circuit (6), a current as shown in FIG. 3 flows as the base current of the transistor (3). This base current makes the transistor 181 conductive, short-circuits both ends of the load (4), and the load voltage becomes zero.

入力信号がオフとなると制御回路(8)の発振が停止し
て、ペース電流が流れ なくなるのでトランジスタ(8)は再び非導通となる。
When the input signal is turned off, the oscillation of the control circuit (8) stops and the pace current stops flowing, so the transistor (8) becomes non-conductive again.

以上のようにして制御回 路(8)によって負荷電圧を制御する。ここで制御回路
(8)とスイッチ回路部分はトランス(7)によって直
流的な絶縁がなされている。
As described above, the load voltage is controlled by the control circuit (8). Here, the control circuit (8) and the switch circuit portion are DC-insulated by a transformer (7).

従来のスイッチ回路は以上のように 構成されているので、スイッチ時間は トランジスタ13)の性能に影響を受けもところがトラ
ンジスタ(3)は耐電圧が高くなると、スイッチスピー
ドが違くな る傾向がある。したがって電源(1:の電圧によってス
イッチ速度が制限される という欠点があった。例えば、耐電圧 s’oovのとき、一般的なスイッチングスピードはl
ll5が限度である。
Since the conventional switch circuit is configured as described above, the switching time is affected by the performance of the transistor (13), but as the withstand voltage of the transistor (3) increases, the switching speed tends to vary. Therefore, there was a drawback that the switching speed was limited by the voltage of the power supply (1:).For example, when the withstand voltage s'oov, the general switching speed was l
ll5 is the limit.

この′発明は上記のような従来のもの の欠点を改良するためになされたもの であり、バイポーラ型のトランジスタ に立上りの速いトランジスタを並列に 接続して、パルストランスを介して立 上りの速いトランジスタに駆動信号を 与えゝ、信号の立上り部分をこのトランジスタで補い、
負荷に印加する電圧を 変速で切替えると共に直流的な絶縁も 可能なスイッチ回路を提供することを 目的としている。
This invention was made to improve the drawbacks of the conventional ones as described above, and it connects bipolar transistors with fast rise times in parallel and drives the fast rise transistors through a pulse transformer. Give a signal, compensate for the rising part of the signal with this transistor,
It is an object of the present invention to provide a switch circuit that can change the voltage applied to a load at variable speeds and also provide direct current insulation.

以下、この発明の一実施例を図にっ て説明する。、第4図において、第1図と同一符号を付
したものは同−又は相 当品を示す。また、(18)は制御回路1、αつは立上
りの速いトランジスタ(以下ト   1.マランジスタ
という。)、(4)は抵抗1. (21)はパルストラ
ンスである。
Hereinafter, one embodiment of the present invention will be described with reference to the drawings. , In FIG. 4, the same reference numerals as in FIG. 1 indicate the same or equivalent products. Also, (18) is the control circuit 1, α is a fast rising transistor (hereinafter referred to as a transistor), and (4) is a resistor 1. (21) is a pulse transformer.

次に動作を説明する。制御回路(18)からの信号はト
ランス(7)を経てバイポーラ型のトランジスタ(3)
へ供給されると共に、パルストランス(21)を経て前
記バイポーラ型トランジスタ(8)と並列に接続されて
いる。トランジスタ(19)へ供給されそれぞれを制御
して変速スイッチ ングを行う。このような構成のスイッ チ回路によるとトランジスタ(81のオン時間の連れを
トランジスタ(19)により次のようにして補うことが
できる。まず 、トランジスタ(81とトランジスタで19)がオフの
状態にあると1、電源11+の電圧はほとんど負荷(4
)に印加されている。次に入力信号が制御回路(18)
に入るとパルストランス(21)を経てトランジスタ(
19)を導通させる方向に一定パルス幅のゲー ト電圧が印加されmeそれと同時にト ランジスタ131にもトランス(71と整流回路(6)
を通して第3図に示すような駆動べ一電流が流れる。
Next, the operation will be explained. The signal from the control circuit (18) passes through the transformer (7) and is transferred to the bipolar transistor (3).
and is connected in parallel with the bipolar transistor (8) via a pulse transformer (21). It is supplied to the transistors (19) and controls each of them to perform speed change switching. According to the switch circuit with such a configuration, the delay in the on time of the transistor (81) can be compensated for by the transistor (19) as follows. First, when the transistor (81 and the transistor 19) is in the off state, 1. The voltage of the power supply 11+ is almost the same as the load (4
) is applied. Next, the input signal is the control circuit (18)
Once in the pulse transformer (21), the transistor (
A gate voltage of a constant pulse width is applied in the direction of making the transistor 131 conductive (71) and the rectifier circuit (6) at the same time.
A driving current as shown in FIG. 3 flows through the capacitor.

このようにすると負荷(引は、まず最 初にスイッチ時間の短いトランジスタ (19)により高速に短絡される。そして、このトラン
ジスタα9)が非導通となる頃にはトランジスタ(8)
が導通状態となっているので負荷(41の短絡状態が維
持される。その後は電源電圧と保護抵抗値 及び、トランジスタ(8)の直流増幅率で決まる小さな
ペース電流を与えることに より、任意の時間だけ負荷(4:の短絡状態を保つこと
ができる。
In this way, the load is first short-circuited quickly by the transistor (19) with a short switching time.Then, by the time this transistor α9 becomes non-conductive, the transistor (8)
is in a conductive state, so the short-circuited state of the load (41) is maintained.After that, by applying a small pace current determined by the power supply voltage, protection resistance value, and DC amplification factor of the transistor (8), Only the load (4:) can be kept short-circuited.

このときの各部の波形を示したもの が第6図である。同図で(a)は制御回路α8)からの
入力信号である。(b)はトランジスタ(8)のみを動
作させたときの出力波形、(C)はパルストランス(2
1)を介してトランジスタ(19)のゲートに印加され
る電圧波形、(d)はトランジスタ(19)のみを動作
させたときの出力波形、である。
FIG. 6 shows the waveforms of each part at this time. In the figure, (a) is an input signal from the control circuit α8). (b) is the output waveform when only the transistor (8) is operated, (C) is the pulse transformer (2
1) is the voltage waveform applied to the gate of the transistor (19), and (d) is the output waveform when only the transistor (19) is operated.

そして、ここでトランジスタ(19)の駆動パルス幅を
トランジスタ(31のスイッチ内聞よりも長くしておく
と、第6図 eのような立上りの速い出力波形が得 られる。なお、ここでVは最初負荷に 印加されていた電圧である。。
If the drive pulse width of the transistor (19) is made longer than the width of the switch of the transistor (31), an output waveform with a fast rise as shown in Fig. 6e can be obtained. This is the voltage that was initially applied to the load.

以上の考え方に基づいて構成したス イッチ回路によれば電圧to ovでa/μS程度の速
さで負荷の電圧を切替え ることができる。
According to the switch circuit configured based on the above concept, the voltage of the load can be switched at a speed of about a/μS at the voltage to ov.

なお、上記実施例では従来のスイッ チ素子としてトランジスタを用いた例 を示したが、真空管式スイッチヤリレ イ等を用いた場合でも上記実施例と同 様の効果を毒する。Note that in the above embodiment, the conventional switch Example of using a transistor as a chip However, the vacuum tube type switch It is the same as the above example even when using Poisoning effect.

以上のように、この発明によればバ イポーラ型トランジスタと立上りの速 いトランジスタを並列に接続して、そ れぞれをトランスを介して駆動するよ うにしているので、DC的絶縁が行え て、しかも高速に電圧を切替えること ができる効果が得られる。As described above, according to the present invention, the battery Ipolar transistor and rise speed By connecting two transistors in parallel, Each is driven via a transformer. DC insulation can be performed. and switch the voltage quickly The effect that can be obtained is obtained.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は従来のスイッチ回路を示す 構成図1、第2図及び第3図はトランジスタ)8)の駆
動用信号の波形を示す図、第4図はこの発明の一実施例
による高 速スイッチ回路の構成図、第5図は前 記実施例における入力信号と各部の動 作波形の関係を示す図である。 (!1・・・・直流電源、セ2)・・・・保護抵抗、1
8)・・・・トランジスタ、(41・・・・負荷、(5
)・・・・制限抵抗、(6)・・・・整流回路、(71
・・・・トランス、(81・・・・制御回路、αω・・
・・立上りの速いトランジスタ、■)・・・・抵抗、Q
υ・・・・パルストランス。 なお、図中、同一符号は同−又は相 当部分を示す。□ 第1図 第2凶       第3図 14凶 15図
FIG. 1 shows the configuration of a conventional switch circuit. FIGS. 1, 2, and 3 are diagrams showing waveforms of drive signals for transistors (8). FIG. 4 shows a high-speed switch circuit according to an embodiment of the present invention. FIG. 5 is a diagram showing the relationship between input signals and operating waveforms of each part in the embodiment. (!1...DC power supply, Se2)...Protective resistor, 1
8)...Transistor, (41...Load, (5
)...Limiting resistance, (6)... Rectifier circuit, (71
...Transformer, (81...Control circuit, αω...
...Fast rise transistor, ■)...Resistance, Q
υ...Pulse transformer. In addition, in the figures, the same reference numerals indicate the same or corresponding parts. □ Figure 1 Figure 2 Figure 3 Figure 14 Figure 15

Claims (1)

【特許請求の範囲】 電源と、これに直列に接続された保 護抵抗と、前記直列回路の両端に接続 された負荷と、前記負荷と並列に接続 され制御信号に応じこの負荷の両端を 短絡するスイッチ素子及びこのスイッ チ素子に並列に接続された立上りの速 いトランジスタと、割部信号源からの 制御信号を前記スイッチ素子と前記ト ランジスタに直流的に絶縁して伝達す るトランスとを備えた高速スイッチ回 路。[Claims] The power supply and the protection connected in series with it. protection resistor and connected to both ends of the series circuit. connected in parallel with said load. Both ends of this load are controlled according to the control signal. The short-circuited switch element and this switch Rise speed connected in parallel to from the large transistor and the split signal source. A control signal is transmitted between the switch element and the trigger. Direct current is isolated and transmitted to the transistor. High-speed switch circuit with transformer Road.
JP56110668A 1981-07-17 1981-07-17 High-speed switch circuit Pending JPS5813021A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56110668A JPS5813021A (en) 1981-07-17 1981-07-17 High-speed switch circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56110668A JPS5813021A (en) 1981-07-17 1981-07-17 High-speed switch circuit

Publications (1)

Publication Number Publication Date
JPS5813021A true JPS5813021A (en) 1983-01-25

Family

ID=14541431

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56110668A Pending JPS5813021A (en) 1981-07-17 1981-07-17 High-speed switch circuit

Country Status (1)

Country Link
JP (1) JPS5813021A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904889A (en) * 1987-12-03 1990-02-27 Sgs-Thomson Microelectronics S.R.L. Circuit for driving electronic devices with a low supply voltage

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562735A (en) * 1979-06-12 1981-01-13 Ibm Switching device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS562735A (en) * 1979-06-12 1981-01-13 Ibm Switching device

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4904889A (en) * 1987-12-03 1990-02-27 Sgs-Thomson Microelectronics S.R.L. Circuit for driving electronic devices with a low supply voltage

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