JPS5812370A - High molecular semiconductor element - Google Patents

High molecular semiconductor element

Info

Publication number
JPS5812370A
JPS5812370A JP56109339A JP10933981A JPS5812370A JP S5812370 A JPS5812370 A JP S5812370A JP 56109339 A JP56109339 A JP 56109339A JP 10933981 A JP10933981 A JP 10933981A JP S5812370 A JPS5812370 A JP S5812370A
Authority
JP
Japan
Prior art keywords
polyacetylene
film
poly
junction
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56109339A
Other languages
Japanese (ja)
Other versions
JPH0414513B2 (en
Inventor
Shinichi Muramatsu
信一 村松
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP56109339A priority Critical patent/JPS5812370A/en
Publication of JPS5812370A publication Critical patent/JPS5812370A/en
Publication of JPH0414513B2 publication Critical patent/JPH0414513B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices adapted for rectifying, amplifying, oscillating or switching, or capacitors or resistors with at least one potential-jump barrier or surface barrier, e.g. PN junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof  ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/86—Types of semiconductor device ; Multistep manufacturing processes therefor controllable only by variation of the electric current supplied, or only the electric potential applied, to one or more of the electrodes carrying the current to be rectified, amplified, oscillated or switched
    • H01L29/861—Diodes
    • H01L29/872—Schottky diodes
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00—Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L24/02—Bonding areas ; Manufacturing methods related thereto
    • H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L24/06—Structure, shape, material or disposition of the bonding areas prior to the connecting process of a plurality of bonding areas
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K10/00—Organic devices specially adapted for rectifying, amplifying, oscillating or switching; Organic capacitors or resistors having a potential-jump barrier or a surface barrier
    • H10K10/20—Organic diodes
    • H10K10/26—Diodes comprising organic-organic junctions
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10—Organic polymers or oligomers
    • H10K85/111—Organic polymers or oligomers comprising aromatic, heteroaromatic, or aryl chains, e.g. polyaniline, polyphenylene or polyphenylene vinylene
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10K—ORGANIC ELECTRIC SOLID-STATE DEVICES
    • H10K85/00—Organic materials used in the body or electrodes of devices covered by this subclass
    • H10K85/10—Organic polymers or oligomers
    • H10K85/141—Organic polymers or oligomers comprising aliphatic or olefinic chains, e.g. poly N-vinylcarbazol, PVC or PTFE
    • H10K85/143—Polyacetylene; Derivatives thereof
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/02—Bonding areas; Manufacturing methods related thereto
    • H01L2224/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
    • H01L2224/04042—Bonding areas specifically adapted for wire connectors, e.g. wirebond pads
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/484—Connecting portions
    • H01L2224/48463—Connecting portions the connecting portion on the bonding area of the semiconductor or solid-state body being a ball bond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42—Wire connectors; Manufacturing methods related thereto
    • H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49—Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491—Disposition
    • H01L2224/49105—Connecting at different heights
    • H01L2224/49107—Connecting at different heights on the semiconductor or solid-state body
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
    • Y02E10/00—Energy generation through renewable energy sources
    • Y02E10/50—Photovoltaic [PV] energy
    • Y02E10/549—Organic PV cells
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
    • Y02P—CLIMATE CHANGE MITIGATION TECHNOLOGIES IN THE PRODUCTION OR PROCESSING OF GOODS
    • Y02P70/00—Climate change mitigation technologies in the production process for final industrial or consumer products
    • Y02P70/50—Manufacturing or production processes characterised by the final manufactured product

Abstract

PURPOSE:To enable to obtain easily a junction having the favorable electric characteristic of a high molecular semiconductor element by a method wherein polyacetylene is rearranged with a straight chain conjugated system polymer except polyacetylene. CONSTITUTION:A poly(p-phenylene sulfide) sheet is left as it is in AsF5 gas, and a P type conductive substrate 1 having the conductivity of 1OMEGAcm<-1> is obtained. The polyacetylene film 2 of 1mum thickness is formed thereon by the well- known polymeric photoconductor thin film formation method. After then, the substrate 1 is dipt in the naphthalene complex solution of potassium to perform doping to the polyacetylene film 2. At this time, although potassium is doped in polyacetylene, but is not doped in poly(p-phenylene sulfide), and the favorable P-N junction 12 is formed at the boundary between the substrate 1 and the polyacetylene film 2. After then, aluminum 3 is evporated at 0.5mum thickness for leading out of electrode. Accordingly the diode having the P-N junction and being equipped with a protective film, an electrode and a lead wire can be obtained.

Description

【発明の詳細な説明】 本発明は高分子半導体素子に関し、さらに詳述すれば、
直鎖状共役系高分子薄膜を使用した高分子半導体素子に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a polymer semiconductor device, and more specifically,
This invention relates to a polymer semiconductor device using a linear conjugated polymer thin film.

半導体素子は、Ｓｉ、Ｇｏなどの金属、あるいは、Ｇａ
Ａｓ、ＩｎＰなどの無機化合物を主たる構成材料として
使用されるのが一般的である。しかし、一方において、
古くから、有機半導体、すなわち、有機物質であって電
気的に半導体的な電気的性質を有するものも研究もしく
は検討されてきている。The semiconductor element is made of metal such as Si, Go, or Ga.
Generally, an inorganic compound such as As or InP is used as the main constituent material. However, on the other hand,
For a long time, organic semiconductors, that is, organic substances that have semiconductor-like electrical properties have been studied or studied.

このような有機半導体材料として、比較的著名なものに
、ポリアセチレンがある。このポリアセチレンは、容易
に薄膜状に取得し得て（例えば、特公昭４８−３２５８
１）、所定のドーピング剤を添加させてＰ（導電）濯に
もｎ（導電）型に形成し、太陽電池等に供されて匹る。A relatively well-known example of such an organic semiconductor material is polyacetylene. This polyacetylene can be easily obtained in the form of a thin film (for example, Japanese Patent Publication No. 48-3258
1) A predetermined doping agent is added to the P (conductive) solution to form it into an N (conductive) type, which is then used in solar cells and the like.

しかし、このポリアセチレン膜は、多くの空隙を有する
ために、ドーピングは不均一に、かつ、速やかに進行す
る。乙のためｐ　−ｎ接合を作ることが困−であった。However, since this polyacetylene film has many voids, doping progresses unevenly and rapidly. Therefore, it was difficult to create a p-n junction.

本宛８１Ｉｏ目的は、上記欠点のない電気的特性の良好
な、かつ、製作の容易な高分子半導体素子を提供するこ
とにある。The purpose of the present invention is to provide a polymer semiconductor device which does not have the above-mentioned drawbacks, has good electrical characteristics, and is easy to manufacture.

上記目的を達成するための本発明の構成は、導電性を有
する直鎖状共役系高分子または有機化合物よ〕なる薄膜
と、該薄膜上に形成された導電性を有する他の直鎖状共
役系高分子薄膜のそれぞれの薄膜はｐもしくはｎ導電型
であって、かつ、電気的な接合面を有してなる。To achieve the above object, the present invention has a thin film made of a conductive linear conjugated polymer or an organic compound, and a conductive linear conjugate film formed on the thin film. Each thin film of the system polymer thin film is of p- or n-conductivity type and has an electrical bonding surface.

上記直鎖状共役系高分子は、ポリアセチレン、ポリ（バ
ラ−フェニレン）、ポリ（ハラ−フェニレンスルフィド
）、ポリ（パラ−フェニレンオ中シ）”　）　、および
、ポリ（パラ−フェニレンビニレン）が供される。これ
らの高分子相互間、あるいは、他の有機化合物とが電気
的に接合され、ＰＮ接合面、ヘテ曹接合面、Ｐ−−−Ｐ
面、および、ｎφ−ｎ面が形成されていることが肝要で
ある。The above-mentioned linear conjugated polymers include polyacetylene, poly(para-phenylene), poly(hala-phenylene sulfide), poly(para-phenylene), and poly(para-phenylene vinylene). These polymers or other organic compounds are electrically bonded to form a PN junction surface, a carbonate junction surface, a P---P
It is important that a plane and an nφ-n plane are formed.

とくに、ポリアセチレンと他の直鎖状共役系高分子を組
合わされたものがよ〕有効である。Particularly effective are combinations of polyacetylene and other linear conjugated polymers.

上記導電型を形成するドーピング剤（ドーパント）とし
ては下記のものを用いるとよい。すなわち、Ｎ導電型と
して、リチウム、ナトリウム、カリウム、ルビジウム及
びセシウムを含む第１ム族金属、ナトリクムナフタレン
、カリウムナフタレン、ナトリウムビフェニル、及びカ
リウムナフタレン等の第１ム族金属アレン等が適用でき
る。ｔた、Ｐ導電型として、ハロゲン、ＨＣｌＯ４を含
むブレンステッド酸、ＳＯａ及びＮ、　Ｏ，を含む非金
属酸化物、ｓｂ、ｓ、を含む第Ｖ族元素のスルフィド、
第■Ｂ■遷移金属、ＩＢ％厘ム及び７人族のハａゲン化
物、及び８ｂＣｔｌを含む不活性ガス、ＢＣＩＢ　、Ｃ
ｒ０ＨＣ１＊　ｅ　ＣｒＯｘ’ｓ＊　８”ａＣ１＊＊ム
ｓｒ、、ＸｅＦ４．Ｘｅ０Ｐ４，８ｂＦ、、ＰＰ、。As the doping agent (dopant) for forming the above-mentioned conductivity type, the following may be used. That is, as the N conductivity type, Mu group 1 metals including lithium, sodium, potassium, rubidium, and cesium, Mu group 1 metals arene such as sodium naphthalene, potassium naphthalene, sodium biphenyl, and potassium naphthalene, etc. can be used. In addition, as P conductivity type, halogen, Brønsted acid containing HClO4, SOa and non-metal oxide containing N, O, sulfide of group V element containing sb, s,
Chapter ■B■ Inert gas containing transition metals, IB% and Group 7 halides, and 8bCtl, BCIB, C
r0HC1* e CrOx's* 8"aC1**musr,,XeF4.Xe0P4,8bF,,PP,.

ＢＰ、、ＢＣ／、、８ｂＢｒ、、ＣｕＣＪ、、Ｎ、Ｃｒ
。BP,,BC/,,8bBr,,CuCJ,,N,Cr
.

及びＭｏＣｒ、等のハａゲン化物及びＦ２Ｏ，００８０
゜Ｆを含むフッ素含有過酸化物又はそれ等の混合物等が
適用できる。これらの導体ドーピング剤濃度は１０”’
　−ｗ　Ｑ、５モル−である（単位上ツマー当りのモル
チ）。and MoCr, etc., and F2O,0080
A fluorine-containing peroxide containing °F or a mixture thereof can be used. These conductor doping agent concentrations are 10'''
-w Q, 5 mol- (molti per unit upper mass).

本発明は上記構成になるので電気的特性の良好な接合が
得られる。すなわち、上記ポリ（パラ−フェニレン）、
ポリ（ハラ−フェニレンスルフィド）、ポリ（パラーフ
ェニレンオキシド）、或いは、ポリ（パラ−フェニレン
ビニレン）は材料組織が緻密な構成を呈しているため、
上記ポリアセチレンに比べてドーピング速度が１桁以上
も遅い。Since the present invention has the above configuration, a bond with good electrical characteristics can be obtained. That is, the above poly(para-phenylene),
Poly(hala-phenylene sulfide), poly(para-phenylene oxide), or poly(para-phenylene vinylene) have a dense material structure, so
The doping rate is one order of magnitude slower than that of the polyacetylene mentioned above.

そのため、上記ポリ（パラ−フェニレンスルフィド）薄
膜内に精度よく制御されて接合面が形成される。勿論、
温度、時間等を適当に制御することくよシ、薄膜の厚さ
分だけ過不足なく所定の導電型に形成でＩ九、従来の、
ポリアセチレン膜では、該属の深さ方向に目的とすると
ζろＯ深さの導電型領域を実質的に形成し得なかったも
のである。Therefore, a bonding surface is formed in the poly(para-phenylene sulfide) thin film in a precisely controlled manner. Of course,
By appropriately controlling the temperature, time, etc., the film can be formed into a predetermined conductivity type just by the thickness of the thin film.
In the polyacetylene film, it has been virtually impossible to form a conductivity type region with a depth of ζ 0 in the depth direction.

本発明は、ポリアセチレン膜を下地として上部にポリ（
パラ−フェニレンスルフィド）ナトポリアセチレン膜と
は異なった直鎖状共役系高分子膜を載置したものにとシ
わけ有効である。材料の互ｈｔｃＪ％なる境界画をその
ままヘテ１接合などの接合面として設けることが極めて
容易となるからである。上記直鎖状共役系高分子材料の
替シにメロシア早／などの有機色素からなる有機化合物
であっても全く同様に適用され、顕著な効果が得られた
。以下実施例を用いて詳述する。The present invention uses a polyacetylene film as a base and a poly(
This method is particularly effective for those equipped with a linear conjugated polymer film different from a para-phenylene sulfide (natopolyacetylene) film. This is because it is extremely easy to provide the boundary line of the material with the same htcJ% as it is as a joint surface such as a hete 1 joint. As an alternative to the linear conjugated polymer material mentioned above, an organic compound consisting of an organic dye such as Merosia/or the like was applied in exactly the same manner, and remarkable effects were obtained. This will be explained in detail below using examples.

実施例　１ 本発明の第１の実施例を第１図に示す、厚さ、５０μｍ
のポリ（ハラーフェニレンスルフイド）シートをムｓＦ
、ガス中に放置しｌｆｌ″″備゛１の導電率のＰ導電型
の基板ｌを得た。この上に公知の高分子す導体薄膜形成
方法（例えば特公昭４８−３２５８１）でポリアセチレ
ン膜２を１μｍの厚さに形成した。このと自、選択的に
成長させる丸めに、不要部分は金属マスクで覆って反応
させた。Example 1 A first example of the present invention is shown in FIG. 1, thickness: 50 μm.
sF poly(halophenylene sulfide) sheet
Then, the substrate was left in a gas to obtain a P conductivity type substrate 1 having a conductivity of 1. A polyacetylene film 2 having a thickness of 1 μm was formed thereon by a known polymer conductor thin film forming method (for example, Japanese Patent Publication No. 48-32581). In this case, the unnecessary parts were covered with a metal mask and reacted to the rounded shape that was selectively grown.

この後、上記基板ｌをカリウムのす７タレン錯体溶液に
浸してポリアセチレン膜２にドーピングを行った。この
と自、カリウムはポリアセチレンにはドーピングされ九
が、ポリ（パラ−フェニレンスルフィド）にはドーピン
グされず上記基板ｌとポリアセチレン膜２との境界で良
好なｐ−ｎ＊合１２が形成された。この後、電極域シ出
しのためにアルミニウム３をα５μｍの厚さに蒸着した
。Thereafter, the above-mentioned substrate 1 was immersed in a potassium-stalene complex solution to dope the polyacetylene film 2. In this case, the polyacetylene was doped with potassium, but the poly(para-phenylene sulfide) was not doped, and a good p-n* mixture 12 was formed at the boundary between the substrate 1 and the polyacetylene film 2. Thereafter, aluminum 3 was deposited to a thickness of α5 μm to expose the electrode area.

このときも、電極パターン形成のために金属マスク（図
示せず）を用い九。これＫよって、保膜膜あるいは電極
、リード線が取〕付けられ九、　ＰＮ接合を有したダイ
オードが得られた。Also at this time, a metal mask (not shown) was used to form the electrode pattern. Accordingly, a protective film, electrodes, and lead wires were attached, and a diode with a PN junction was obtained.

実施例　２ 第２図に第２の実施例を示す。ガラス基板４上に実施例
１と同じ方法でポリアセチレン膜５を３μｍの厚さに堆
積し、続いてポリ（パラ−フェニレンスルフィド）６を
３μｍの厚さに塗布法で被着した。この後、試料をＡｓ
Ｆ−ガス中に数日間放置した。その結果、ポリアセチレ
ンはＰ◆にポリ（パラ−フェニレンスルフィド）ｔｌｊ
：ＰＫドーピングされた。さらに、その上に絶縁膜とし
てポリ（パラ−フェニレンスルフィド）　６　’　ｔｊ
ｌｋ布法テ３μｍの厚さに被着した。さらに公知の光食
刻法によ〕電極領域形成のためのバターニングを行い、
続いてクロルを含む芳香族化合物で上記ポリ（パラ−フ
ェニレンスルフィド）をｊｌ［６オ！ヒ６’　ヲ選択的
にエツチングした。この後、アルミニウム７を蒸着法に
より堆積し、パターニングを行って成極を形成した０以
上の工程で、ガラス基板４上のポリアセチレン膜５で挾
まれた領域に在るポリ（パラ−フェニレンスルフィド）
６を主ａ域とするｌΩ−１３−１のｐ”　−ｐ−ｐ”　
’ｉ１Ｈの抵抗素子が得られ九。Example 2 A second example is shown in FIG. A polyacetylene film 5 was deposited to a thickness of 3 μm on a glass substrate 4 in the same manner as in Example 1, and then poly(para-phenylene sulfide) 6 was coated to a thickness of 3 μm by coating. After this, the sample was
It was left in F-gas for several days. As a result, polyacetylene is converted to P◆ by poly(para-phenylene sulfide) tlj
: PK doped. Furthermore, poly(para-phenylene sulfide) 6' tj is formed as an insulating film on top of this.
It was applied to a thickness of 3 μm using the LK fabric method. Furthermore, buttering is performed to form an electrode region by a known photolithography method.
Subsequently, the above poly(para-phenylene sulfide) was treated with an aromatic compound containing chlorine. 6' was selectively etched. After that, in the step 0 or more in which aluminum 7 is deposited by vapor deposition and patterned to form polarization, poly(para-phenylene sulfide) existing in the area sandwiched by the polyacetylene film 5 on the glass substrate 4 is formed.
p"-p-p" of lΩ-13-1 with 6 as main a region
'i1H resistance element was obtained.9.

実施例　３ 第３図（Ｊｌ）および（ロ）は本発明の他の実施例とし
ての高分子半導体素子の概略断藺図である。Example 3 FIGS. 3 (Jl) and (B) are schematic cross-sectional views of a polymer semiconductor device as another example of the present invention.

図において、ポリ（ハラ−フェニレンスルフィド）膜３
１上に１膜厚２μｍのポリアセチレン膜３２を公知の薄
膜形成技術を用いて形成する１次いで、上記薄膜をＡｓ
Ｆ、　ガス雰囲気中に１０分間放置させて、上記膜ｓｉ
ｏ＊からドーピングして膜３１および３２をＰ導電型に
形成する１次いで、上記膜３２上に全面塗布法によシ、
ガラス膜３４を形成する１次いで、該膜３４に写真食刻
用のフォトレジスト材（図示せず）を塗布し、同化後、
パターニングを行なう。次いで、残存したフォトレジス
ト材をマスク圧して選択的にカリウム（Ｋ）を１００　
ＫａＶでイオン打込みを行ない上記薄膜３２を選択的に
Ｎ導電型領域３３に変換させて形成する。次いで、上記
フォトレジスト材をエツチングマスクとして露呈してい
るガラス膜３４を選択的に除去し、電極取出し口とする
。次いで、上記ガラス膜３４上の所定の電極ＫＡＩを膜
厚１μｍ蒸着し、次いで所定の形状に加工してゲート電
極３５とする。同時に、上記電極取出し口に電極３６を
設けてＭＯａ型トランジスタを形成する。８はソース電
極、Ｄはドレイン電極、Ｇはゲート電極をそれぞれ表わ
す、上記イオン打込み方法は、各種あるが、執れも本発
明に差違なく適用でき、同様の効果を呈した。勿論、打
込みパワー、或いはマスク材、１スク方法が適宜選択さ
れて用いることは云うまでもない。通常、ＩＣなどの半
導体製造技術を用いればよい。この実施例テハ、ポリ（
パラ−フェニレンスルフィド）膜３１自体が基板を兼ね
た場合にりｉで示したが、第３図（ロ）に示すように、
ガラス３０などの無機材料を基板としてこの上に上記ポ
リ（パラ−フェニレンスルフィド）膜３１を設けたもの
も全く同様の効禽奏した。なお、符号３１０は薄膜相互
間の境界面を示している。を九、図示されてはいないが
、Ｎ導電型領域３３は、上記境界面３１０に到達してい
なくとも充分動作し、同様の効を奏し九。In the figure, poly(hala-phenylene sulfide) film 3
A polyacetylene film 32 having a thickness of 2 μm is formed on the film using a known thin film forming technique.
F. The above film si was left in a gas atmosphere for 10 minutes.
doping from o* to form the films 31 and 32 to be of P conductivity type;
Forming the glass film 34 Next, a photoresist material (not shown) for photolithography is applied to the film 34, and after assimilation,
Perform patterning. Next, the remaining photoresist material is selectively coated with 100% potassium (K) using a mask.
The thin film 32 is selectively converted into an N conductivity type region 33 by performing ion implantation using KaV. Next, the exposed glass film 34 is selectively removed using the photoresist material as an etching mask to form an electrode outlet. Next, a predetermined electrode KAI is deposited on the glass film 34 to a thickness of 1 μm, and then processed into a predetermined shape to form the gate electrode 35. At the same time, an electrode 36 is provided at the electrode outlet to form an MOa type transistor. Reference numeral 8 represents a source electrode, D represents a drain electrode, and G represents a gate electrode. Although there are various ion implantation methods described above, any of them can be applied to the present invention without any difference, and the same effects were obtained. Of course, it goes without saying that the implanting power, mask material, and single-scroll method may be selected and used as appropriate. Normally, semiconductor manufacturing technology such as IC may be used. This example teha, poly(
In the case where the (para-phenylene sulfide) film 31 itself also serves as a substrate, as shown in Figure 3 (b),
A similar effect was achieved using an inorganic material such as glass 30 as a substrate and the poly(para-phenylene sulfide) film 31 provided thereon. Note that the reference numeral 310 indicates the boundary surface between the thin films. (9) Although not shown, the N-conductivity type region 33 operates satisfactorily even if it does not reach the boundary surface 310, and produces the same effect.

実施例　４ 本発明は亦、太陽電池などの変換素子をも構成し得るも
のである。すなわち、Ａ／根板上設けられたポリアセチ
レンシート上に％　２　ａｎ角厚ｉ５０．ｉ〜ｌＯμｍ
　ｑ）　Ｐ導ｔｍのメロシアニン膜を形成し、該膜上に
金属電極を設けることくよシ容易に太陽電池が形成され
た。勿論、導電率および導電層の形成は前述の実施例を
用いて行なわれる。上記メロシアニンは有機化合物であ
〕色素として汎用されているものである。このような色
素は、他の色素の材料であっても差違なく適用で−る１
色素は光応答性が良好なので、極めて感度の良好な太陽
電池が得られた。Embodiment 4 The present invention can also constitute a conversion element such as a solar cell. That is, % 2 an angular thickness i50. i～lOμm
q) A solar cell was easily formed by forming a P-conducting tm merocyanine film and providing a metal electrode on the film. Of course, the conductivity and formation of the conductive layer may be carried out using the previously described embodiments. The above merocyanine is an organic compound that is commonly used as a pigment. Such dyes can be applied to other dye materials without any difference1.
Since the dye has good photoresponsiveness, a solar cell with extremely good sensitivity was obtained.

以上詳述したように、本発明はボリア七テレンをそれ以
外の直鎖状共役系高分子と組合わせることによシ、極め
て電気的特性の良好な接合を、容易に形成し得る点、工
業的利益大なるものである。As described in detail above, the present invention is capable of easily forming a junction with extremely good electrical properties by combining boria heptathelene with other linear conjugated polymers, and is suitable for industrial use. The benefits are huge.

【図面の簡単な説明】[Brief explanation of the drawing]

第１図〜第３図は本発明の一実施例としての高分子半導
体素子の概略断面図である。 １・・・基板（高分子半導体シート）、２・・・ポリア
セ１ｆＪｌ　　　図1 to 3 are schematic cross-sectional views of a polymer semiconductor device as an embodiment of the present invention. 1... Substrate (polymer semiconductor sheet), 2... Polyacetate 1fJl Figure

Claims (1)

【特許請求の範囲】 Ｌ　導電性を有する直鎖状共役系高分子または有機化合
物よシなる薄膜と、該薄膜に接して形成された導電性を
有する他の直鎖状共役系高分子薄膜とを有する高分子半
導体素子において、上記それぞれの薄膜はＰもしくはｎ
導電型であって、かつ、電気的な接合面を有してなるこ
とを特徴とする高分子半導体素子。 ２、特許請求の範囲第１項において、上記直鎖状共役系
高分子は、ポリアセチレン、ポリ（パラ−フェニレン）
、ポリ（ハラ−フェニレンスルフィト）、ポリ（ハラー
フ二二しンオキシト）、オヨヒ、ポリ（ハラ−フェニレ
ンビニレン）カらなる群のうちから少なく共１者を用い
てなることを特徴とする高分子半導体素子。 ＆　特許請求の範囲第１項において、上記電気的な接合
面は、ＰＮ接合面、Ｐφ−Ｐｌおよび、ｎ４″−ｎｌｉ
であることを特徴とする高分子半導体素子。[Scope of Claims] L A thin film made of a linear conjugated polymer or an organic compound having conductivity, and another thin film of a linear conjugated polymer having conductivity formed in contact with the thin film. In the polymer semiconductor device having P or n
A polymer semiconductor element characterized by being of a conductive type and having an electrical bonding surface. 2. In claim 1, the linear conjugated polymer is polyacetylene, poly(para-phenylene).
, poly(hala-phenylene sulfite), poly(hala-phenylene oxyto), oyohi, and poly(hala-phenylene vinylene). semiconductor element. & In claim 1, the electrical bonding surfaces include a PN bonding surface, Pφ-Pl, and n4″-nli.
A polymer semiconductor device characterized by:
JP56109339A 1981-07-15 1981-07-15 High molecular semiconductor element Granted JPS5812370A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56109339A JPS5812370A (en) 1981-07-15 1981-07-15 High molecular semiconductor element

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56109339A JPS5812370A (en) 1981-07-15 1981-07-15 High molecular semiconductor element

Publications (2)

Publication Number Publication Date
JPS5812370A true JPS5812370A (en) 1983-01-24
JPH0414513B2 JPH0414513B2 (en) 1992-03-13

Family

ID=14507715

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56109339A Granted JPS5812370A (en) 1981-07-15 1981-07-15 High molecular semiconductor element

Country Status (1)

Country Link
JP (1) JPS5812370A (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60154682A (en) * 1984-01-25 1985-08-14 Showa Denko Kk P-n homojunction element
JPS61128569A (en) * 1984-11-23 1986-06-16 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Insulation gate fet
JPS6314472A (en) * 1986-07-04 1988-01-21 Mitsubishi Electric Corp Field-effect transistor
JPS6314471A (en) * 1986-07-04 1988-01-21 Mitsubishi Electric Corp Field-effect transistor
US5153681A (en) * 1989-07-25 1992-10-06 Matsushita Electric Industrial Co., Ltd. Electrcally plastic device and its control method
JP2004125791A (en) * 2002-09-25 2004-04-22 Stmicroelectronics Inc Organic semiconductor sensor device
JP2004221562A (en) * 2002-12-26 2004-08-05 Konica Minolta Holdings Inc Process for fabricating organic thin film transistor element, organic thin film transistor element fabricated by that process, and organic thin film transistor element sheet

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60154682A (en) * 1984-01-25 1985-08-14 Showa Denko Kk P-n homojunction element
JPS61128569A (en) * 1984-11-23 1986-06-16 インタ−ナショナル　ビジネス　マシ−ンズ　コ−ポレ−ション Insulation gate fet
JPS6314472A (en) * 1986-07-04 1988-01-21 Mitsubishi Electric Corp Field-effect transistor
JPS6314471A (en) * 1986-07-04 1988-01-21 Mitsubishi Electric Corp Field-effect transistor
US5153681A (en) * 1989-07-25 1992-10-06 Matsushita Electric Industrial Co., Ltd. Electrcally plastic device and its control method
JP2004125791A (en) * 2002-09-25 2004-04-22 Stmicroelectronics Inc Organic semiconductor sensor device
JP2004221562A (en) * 2002-12-26 2004-08-05 Konica Minolta Holdings Inc Process for fabricating organic thin film transistor element, organic thin film transistor element fabricated by that process, and organic thin film transistor element sheet

Also Published As

Publication number Publication date
JPH0414513B2 (en) 1992-03-13

Similar Documents

Publication Publication Date Title
US20070227578A1 (en) Method for patterning a photovoltaic device comprising CIGS material using an etch process
US4665609A (en) Process of manufacturing a photosensitive device having a plurality of detectors separated by zones impervious to the radiation to be detected
JP2663048B2 (en) Method of manufacturing electroluminescent silicon structure
JPH079914B2 (en) Structure of compound semiconductor device
CN112117351B (en) Method for leading out electrical properties of mercury cadmium telluride pn junction and detector chip
US4349395A (en) Method for producing MOS semiconductor device
JPS5812370A (en) High molecular semiconductor element
KR19980703224A (en) Electroluminescent Devices Including Porous Silicon
US4161744A (en) Passivated semiconductor device and method of making same
JP3106569B2 (en) Light emitting element
JPH07235660A (en) Manufacture of thyristor
US9040401B1 (en) Method for forming patterned doping regions
JPH0139647B2 (en)
JPS5848941A (en) Preparation of semiconductor device
US3476661A (en) Process for increasing the reverse voltage of thermally oxidized silicon members with at least one barrier layer
KR20120010773A (en) Flxible photovoltaic device and fabrication method thereof
KR100189736B1 (en) Trench isolation film forming method of semiconductor device
JPS5712579A (en) Buried type semiconductor laser
KR890003416B1 (en) Semiconductor device
JPS5885583A (en) Manufacture of semiconductor laser
JPS59195823A (en) Electrode formation
JPS6051263B2 (en) Manufacturing method of semiconductor device
JPH0454969B2 (en)
JPS58122770A (en) Manufacture of semiconductor device
CN108987343A (en) Grapheme transistor circuit device and preparation method thereof