JPS58103143A - Sealing of electronic component parts - Google Patents

Sealing of electronic component parts

Info

Publication number
JPS58103143A
JPS58103143A JP20395281A JP20395281A JPS58103143A JP S58103143 A JPS58103143 A JP S58103143A JP 20395281 A JP20395281 A JP 20395281A JP 20395281 A JP20395281 A JP 20395281A JP S58103143 A JPS58103143 A JP S58103143A
Authority
JP
Japan
Prior art keywords
resin
substrate
liquid resin
sealing
liquefied
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP20395281A
Other languages
Japanese (ja)
Inventor
Shin Tada
多田　伸
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP20395281A priority Critical patent/JPS58103143A/en
Publication of JPS58103143A publication Critical patent/JPS58103143A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L23/00—Details of semiconductor or other solid state devices
    • H01L23/28—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection
    • H01L23/31—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape
    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
    • H01L23/3121—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10—Bump connectors; Manufacturing methods related thereto
    • H01L2224/15—Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161—Disposition
    • H01L2224/16151—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225—Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321—Disposition
    • H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32225—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73201—Location after the connecting process on the same surface
    • H01L2224/73203—Bump and layer connectors
    • H01L2224/73204—Bump and layer connectors the bump connector being embedded into the layer connector
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732—Location after the connecting process
    • H01L2224/73251—Location after the connecting process on different surfaces
    • H01L2224/73253—Bump and layer connectors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/1515—Shape
    • H01L2924/15151—Shape the die mounting substrate comprising an aperture, e.g. for underfilling, outgassing, window type wire connections

Abstract

PURPOSE:To make the casting process of liquefied resin to be advanced smoothly by a method wherein liquefied resin passing holes to penetrate a substrate are provided in the mutually confronting region of the substrate and the bonded electronic parts. CONSTITUTION:The liquefied resin passing holes 7 to penetrate the substrate 2a are provided in the region corresponding to the electronic parts bonding part of the substrate 2a consisting of an epoxy glass tape. Then the LSI 1 is bonded to the substrate 2a, and liquefied resin 5 is cast therein. Because liquefied resin 5 cast in a gap between the LSI 1 and the substrate 2a can pass the liquefied resin passing holes 7, stagnation of resin is not generated, stagnation of an air bubble is not also generated, and airtight filling-up can be attained easily. After liquefied resin 5 is cast in, and a resin disk 6 is covered on the LSI 1, it is heated in an oven, and liquefied resins 5, 5' are hardened to complete resin sealing. According to sealing method thereof, casting of liquefied resin can be attained by one time, the resin sealing process is simplified, and the working hours are curtailed.

Description

【発明の詳細な説明】 本発明はＩＣ，ＬＳＩ等の電子部品の封止方法の改良に
関するものである。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to an improvement in a method for sealing electronic components such as ICs and LSIs.

ＩＣ，ＬＳＩ等の電子部品は物理的・化学的な保護が必
要である。この目的に大別して２つの方法で電子部品は
封止されている。即ち、ひとつは気密封止といわれる金
属ケースやセラミック等により封止するものでありコス
トが高い。Electronic components such as ICs and LSIs require physical and chemical protection. Electronic components are encapsulated using two methods for this purpose. That is, one method is called hermetic sealing, which involves sealing with a metal case or ceramic, which is expensive.

第２の方法はシリコーン樹脂やエポキシ樹脂等を用いる
もので樹脂封止といわれるものである。The second method uses silicone resin, epoxy resin, etc. and is called resin sealing.

シリコーン樹脂はパワーデバイス、高周波デバイスに、
エポキシ樹脂はディスクリート、ＩＣ。Silicone resin is used in power devices, high frequency devices,
Epoxy resin is discrete and IC.

ＬＳＩと幅広く用いられている。Widely used with LSI.

従来の樹脂封止方法にういて、第１図乃至第８図の図面
を参照しつつ述べる。A conventional resin sealing method will be described with reference to the drawings of FIGS. 1 to 8.

＃！１図において、１はＬＳＩでエポキシガラステープ
よりなる基板２とボンディング部８で接続されている。#! In FIG. 1, 1 is an LSI connected to a substrate 2 made of epoxy glass tape through a bonding portion 8.

実際に接合しているのはＬＳＩＩと基板２上の導体箔（
例えば鋼箔）であるが、導体箔は図上では省略した。第
１工程では、ＬＳｌｌと基板２の間隙に液状樹脂４を流
し込む。この工程はＬＳＩＩと基板２に挾まれた空間を
液状樹脂４で完全に気密装填するために実施するもので
ある。流し込み終了後オーブンで加熱して液状樹脂４を
硬化させる。What is actually connected is the LSII and the conductor foil on the board 2 (
(for example, steel foil), but the conductor foil is omitted in the diagram. In the first step, liquid resin 4 is poured into the gap between LSll and substrate 2. This step is carried out in order to completely hermetically fill the space between the LSII and the substrate 2 with the liquid resin 4. After pouring, the liquid resin 4 is heated in an oven to harden.

次いで第２工程は第２図に示す如く、第１工程の終了し
たＬＳＩＩ上に液状樹脂５を流し込み、少なくともＬＳ
ＩＩが外気と接触する部分をなくすようＬＳＩＩを液状
樹脂５で包み囲む。第１工程の樹脂４と第２工程の液状
樹脂５は同じ材質の樹脂であっても良い。Next, in the second step, as shown in FIG. 2, liquid resin 5 is poured onto the LSII on which the first step has been completed, and
The LSII is surrounded by a liquid resin 5 so as to eliminate any part of the LSII that comes into contact with the outside air. The resin 4 in the first step and the liquid resin 5 in the second step may be made of the same material.

こうしてＬＳＩＩを樹脂封止完了するとパッケージされ
た電子部品として規格化商品にするため、第８図に示す
通りＬＳＩＩ上に樹脂ディスク６をかぶせる０この際第
２工程でＬＳＩＩの上部にあった液状樹脂５は樹脂ディ
スク６に押されてＬＳＩＩの横にはみ出し液状樹脂５は
ＬＳＩＩの側面をカバーすることになる。加熱し液状樹
脂５を硬化させ、ＬＳＩＩの封止を終了する。Once the resin sealing of the LSII is completed, a resin disk 6 is placed over the LSII as shown in Figure 8 in order to make it a standardized product as a packaged electronic component.At this time, the liquid resin that was on the top of the LSII in the second step The liquid resin 5 is pushed by the resin disk 6 and spills out to the side of the LSII, so that the liquid resin 5 covers the sides of the LSII. The liquid resin 5 is heated and cured to complete the sealing of the LSII.

上述の樹脂封止方法の欠点は、第１工程において液状樹
脂４がＩ、Ｓｌｌと基板２の間隙に完全に気密充填させ
るには多少時間を要すことである。なぜなら、液状樹脂
４を流入するときに液状樹脂４とＬＳＩＩの間に空隙が
できないようゆっくりと液状樹脂４を流入させなければ
ならないからである。The drawback of the above-described resin sealing method is that it takes some time to completely hermetically fill the gap between the liquid resin 4 and the substrate 2 with the liquid resin 4 in the first step. This is because the liquid resin 4 must be allowed to flow slowly so as not to create a gap between the liquid resin 4 and the LSII.

本発明は上述の欠点をなくすため、基板とボンディング
された電子部品の相対向する領域に基板を貫通する液状
樹脂通過孔を設け、電子部品に液状樹脂を流し込んだ際
に一部の液状樹脂が前記液状樹脂通過孔を通過し、液状
樹脂の流し込み工程をスムーズに進行させることを目的
とする。In order to eliminate the above-mentioned drawbacks, the present invention provides a liquid resin passage hole that penetrates the substrate in an area where the substrate and the bonded electronic component face each other, so that when the liquid resin is poured into the electronic component, some of the liquid resin The purpose is to allow the liquid resin to pass through the liquid resin passage hole and smoothly proceed with the pouring process of the liquid resin.

本発明の一実施例を図面（第４図乃至第６図）とともに
説明する。An embodiment of the present invention will be described with reference to the drawings (FIGS. 4 to 6).

エポキシガラステープよりなる基板２ａの電子部品ボン
ディング部にあたる領域に基板２ａを貫通する液状樹脂
通過孔７を設ける（第４図）。この液状樹脂通過孔７の
径は液状樹脂がすみやかに流れるよう液状樹脂の粘性に
よって決まる。さらに、液状樹脂通過孔７の数は、ボン
ディングする電子部品の大きさと用いる液状樹脂の量に
よって異なる。A liquid resin passage hole 7 penetrating the substrate 2a is provided in a region corresponding to the electronic component bonding portion of the substrate 2a made of epoxy glass tape (FIG. 4). The diameter of the liquid resin passage hole 7 is determined by the viscosity of the liquid resin so that the liquid resin flows quickly. Furthermore, the number of liquid resin passage holes 7 varies depending on the size of the electronic component to be bonded and the amount of liquid resin used.

続いて基板２ａにＬＳＩＩをボンディングする（第５図
）。８はボンディング部であり、実際に接合しているの
はＬＳＩＩと基板２ａ上の導体箔（例えば銅箔）である
が、図では導体箔は省略した。ボンディングされたＬＳ
ＩＩに液状樹脂５を流し込む。Subsequently, LSII is bonded to the substrate 2a (FIG. 5). 8 is a bonding portion, and what is actually bonded is the LSII and a conductor foil (for example, copper foil) on the substrate 2a, but the conductor foil is omitted in the figure. Bonded LS
Pour liquid resin 5 into II.

ＬＳＩＩと基板２ａの間隙に流れ込んだ液状樹脂５は、
従来例では間隙の中央付近で滞留が生じ、そのため−担
化じた気泡は移動することなくとどまってしまいがちで
あるが、本実施例では液状樹脂５が液状樹脂通過孔７を
通過できるので滞留は生じず気泡も滞ることなく、容易
に気密充填が可能である。５′は、液状樹脂通過孔７を
通過した液状樹脂である。The liquid resin 5 that has flowed into the gap between the LSII and the substrate 2a is
In the conventional example, stagnation occurs near the center of the gap, and as a result, the solidified air bubbles tend to remain without moving, but in this embodiment, the liquid resin 5 can pass through the liquid resin passage hole 7, so that the stagnation occurs. Air-tight filling is possible without any bubbles or stagnation. 5' is the liquid resin that has passed through the liquid resin passage hole 7.

釘 ＬＳＩＩを包念べく液状樹脂５を流し込むと従来例と同
様にＬＳＩＩ上に樹脂ディスク６をかぶせる（第６図）
。オーブンで加熱し液状樹脂５．５′を硬化する。こう
して樹脂封止を完成する。When liquid resin 5 is poured to cover the nail LSII, a resin disk 6 is placed over the LSII as in the conventional example (Figure 6).
. Heat in an oven to harden the liquid resin 5.5'. In this way, resin sealing is completed.

次に、樹脂封止において液状樹脂通過孔を通過した液状
樹脂を利用し、基板に板材を取り付は基板の強化を図っ
た実施例を述べる。Next, an example will be described in which a plate material is attached to the substrate to strengthen the substrate by using the liquid resin that has passed through the liquid resin passage hole during resin sealing.

第７図は本実施例の樹脂封止を行ったもので、基板２ａ
のＬＳＩＩのボンディング側と反対側に多孔質な板材８
（例えばセラミック材）を接着している点が特徴である
。基板２ａと板材８とは、先の実施例で述べた第６図の
液状樹脂通過孔７を通過した液状樹脂５′によって接着
している。即ち、板材８は多孔質であるため液状樹脂通
過孔７より出てきた液状樹脂５゛を吸収し該液状樹脂５
′の硬化とともに基板２ａと合体するわけである。FIG. 7 shows the resin-sealed substrate 2a of this embodiment.
A porous plate 8 is placed on the opposite side of the LSII bonding side.
It is characterized by bonding (for example, ceramic material). The substrate 2a and the plate material 8 are bonded together by the liquid resin 5' that has passed through the liquid resin passage hole 7 shown in FIG. 6 described in the previous embodiment. That is, since the plate material 8 is porous, it absorbs the liquid resin 5' coming out from the liquid resin passage hole 7, and the liquid resin 5 is
As the film hardens, it is combined with the substrate 2a.

以上本発明の電子部品の封止方法を用いれば、液状樹脂
の流し込みが一回で済み樹脂封止の工程が簡単化されて
作業時間が短縮する。さらに、基板の補強のために多孔
質材を用いれば、基板が反りやすい材質の場合に有効で
封正に伴う基板の彎曲を防ぐことができ、樹脂が液状樹
脂通過孔より落下すること、かない。As described above, if the electronic component sealing method of the present invention is used, the liquid resin only needs to be poured once, which simplifies the resin sealing process and shortens the working time. Furthermore, using a porous material to reinforce the board is effective when the board is made of a material that warps easily, and can prevent the board from curving during sealing, preventing the resin from falling through the liquid resin passage hole. .

【図面の簡単な説明】[Brief explanation of drawings]

第１図乃至第８図は従来の電子部品の樹脂封止方法の工
程図、第４図乃至第６図は本発明の樹脂封止方法の一実
施例工程図、第７図は本発明の樹脂封止方法の他の実施
例の工程完成図である。 ｌ・・・ｌ、Ｓｌ、２ａ・・・基板、３・・・ボンディ
ング部、５．５″・・・液状樹脂、６・・−樹脂ディス
ク、７・・・液状樹脂通過孔、８・・・板材。 代理人　弁理士　福　士　愛　彦 第　ｌ　図 第　２Ｌ二１ 第３図 １９Figures 1 to 8 are process diagrams of a conventional resin sealing method for electronic components, Figures 4 to 6 are process diagrams of an embodiment of the resin sealing method of the present invention, and Figure 7 is a process diagram of an embodiment of the resin sealing method of the present invention. FIG. 7 is a process completion diagram of another example of the resin sealing method. l...l, Sl, 2a...substrate, 3...bonding part, 5.5''...liquid resin, 6...-resin disk, 7...liquid resin passage hole, 8...・Plate materials. Agent: Patent Attorney Aihiko Fukushi Figure 2L-21 Figure 3-19

Claims (1)

【特許請求の範囲】 １、基板にボンディングした電子部品を封止する方法に
おいて、基板として基板とボンディングされた電子部品
の相対向する領域に基板を貫通する液状樹脂通過孔を設
けた基板を用いて、電子部品を覆うべく液状樹脂を流し
込み、該液状樹脂を硬化して電子部品を封止することを
特徴とする電子部品の封止方法。 ２、基板は、該基板の液状樹脂通過孔を貫通して基板の
反対面に出た液状樹脂によって接着される多孔質材によ
って補強されていることを特徴とする特許請求の範囲第
１項記載の電子部品の封止方法。[Claims] 1. A method for sealing an electronic component bonded to a substrate, using a substrate having liquid resin passage holes penetrating through the substrate in areas where the substrate and the bonded electronic component face each other. A method for sealing an electronic component, comprising: pouring a liquid resin to cover the electronic component; and curing the liquid resin to seal the electronic component. 2. The substrate is reinforced by a porous material adhered by the liquid resin that passes through the liquid resin passage hole of the substrate and comes out on the opposite side of the substrate. A method of sealing electronic components.
JP20395281A 1981-12-16 1981-12-16 Sealing of electronic component parts Pending JPS58103143A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP20395281A JPS58103143A (en) 1981-12-16 1981-12-16 Sealing of electronic component parts

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP20395281A JPS58103143A (en) 1981-12-16 1981-12-16 Sealing of electronic component parts

Publications (1)

Publication Number Publication Date
JPS58103143A true JPS58103143A (en) 1983-06-20

Family

ID=16482384

Family Applications (1)

Application Number Title Priority Date Filing Date
JP20395281A Pending JPS58103143A (en) 1981-12-16 1981-12-16 Sealing of electronic component parts

Country Status (1)

Country Link
JP (1) JPS58103143A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262430A (en) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
US5336931A (en) * 1993-09-03 1994-08-09 Motorola, Inc. Anchoring method for flow formed integrated circuit covers
US6558981B2 (en) * 1998-09-16 2003-05-06 International Business Machines Corporation Method for making an encapsulated semiconductor chip module

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS60262430A (en) * 1984-06-08 1985-12-25 Matsushita Electric Ind Co Ltd Manufacture of semiconductor device
JPH027180B2 (en) * 1984-06-08 1990-02-15 Matsushita Electric Ind Co Ltd
US5336931A (en) * 1993-09-03 1994-08-09 Motorola, Inc. Anchoring method for flow formed integrated circuit covers
US6558981B2 (en) * 1998-09-16 2003-05-06 International Business Machines Corporation Method for making an encapsulated semiconductor chip module

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