JPS58101493A - 基板 - Google Patents

基板

Info

Publication number
JPS58101493A
JPS58101493A JP57159722A JP15972282A JPS58101493A JP S58101493 A JPS58101493 A JP S58101493A JP 57159722 A JP57159722 A JP 57159722A JP 15972282 A JP15972282 A JP 15972282A JP S58101493 A JPS58101493 A JP S58101493A
Authority
JP
Japan
Prior art keywords
solder
chip
substrate
bonding
aluminum
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57159722A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6352776B2 (https=
Inventor
ロバ−ト・マ−クス
ダグラス・ウオ−レス・フエルプス・ジユニア
ウイリアム・キヤロル・ワ−ド
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
International Business Machines Corp
Original Assignee
International Business Machines Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by International Business Machines Corp filed Critical International Business Machines Corp
Publication of JPS58101493A publication Critical patent/JPS58101493A/ja
Publication of JPS6352776B2 publication Critical patent/JPS6352776B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
    • H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
    • H05K3/00—Apparatus or processes for manufacturing printed circuits
    • H05K3/40—Forming printed elements for providing electric connections to or between printed circuits
    • H05K3/4007—Surface contacts, e.g. bumps
    • H05K3/4015—Surface contacts, e.g. bumps using auxiliary conductive elements, e.g. pieces of metal foil, metallic spheres
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H10W70/611—Insulating or insulated package substrates; Interposers; Redistribution layers for connecting multiple chips together
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W99/00—Subject matter not provided for in other groups of this subclass
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07511—Treating the bonding area before connecting, e.g. by applying flux or cleaning
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/075—Connecting or disconnecting of bond wires
    • H10W72/07531—Techniques
    • H10W72/07532—Compression bonding, e.g. thermocompression bonding
    • H10W72/07533—Ultrasonic bonding, e.g. thermosonic bonding
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5434—Dispositions of bond wires the connected ends being on auxiliary connecting means on bond pads, e.g. on other bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/541—Dispositions of bond wires
    • H10W72/5445—Dispositions of bond wires being orthogonal to a side surface of the chip, e.g. parallel arrangements
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5522—Materials of bond wires comprising metals or metalloids, e.g. silver comprising gold [Au]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/551—Materials of bond wires
    • H10W72/552—Materials of bond wires comprising metals or metalloids, e.g. silver
    • H10W72/5524—Materials of bond wires comprising metals or metalloids, e.g. silver comprising aluminium [Al]
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/50—Bond wires
    • H10W72/59—Bond pads specially adapted therefor
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/879—Bump connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/851—Dispositions of multiple connectors or interconnections
    • H10W72/874—On different surfaces
    • H10W72/884—Die-attach connectors and bond wires
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/90—Bond pads, in general
    • H10W72/951—Materials of bond pads
    • H10W72/952—Materials of bond pads comprising metals or metalloids, e.g. PbSn, Ag or Cu
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/721—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors
    • H10W90/724—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bump connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/731—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors
    • H10W90/734—Package configurations characterised by the relative positions of pads or connectors relative to package parts of die-attach connectors between a chip and a stacked insulating package substrate, interposer or RDL
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/753—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between laterally-adjacent chips
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations
    • H10W90/701—Package configurations characterised by the relative positions of pads or connectors relative to package parts
    • H10W90/751—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires
    • H10W90/754—Package configurations characterised by the relative positions of pads or connectors relative to package parts of bond wires between a chip and a stacked insulating package substrate, interposer or RDL

Landscapes

  • Engineering & Computer Science (AREA)
  • Manufacturing & Machinery (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Wire Bonding (AREA)
  • Electric Connection Of Electric Components To Printed Circuits (AREA)
JP57159722A 1981-12-09 1982-09-16 基板 Granted JPS58101493A (ja)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US328889 1981-12-09
US06/328,889 US4447857A (en) 1981-12-09 1981-12-09 Substrate with multiple type connections

Publications (2)

Publication Number Publication Date
JPS58101493A true JPS58101493A (ja) 1983-06-16
JPS6352776B2 JPS6352776B2 (https=) 1988-10-20

Family

ID=23282896

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57159722A Granted JPS58101493A (ja) 1981-12-09 1982-09-16 基板

Country Status (4)

Country Link
US (1) US4447857A (https=)
EP (1) EP0081135B1 (https=)
JP (1) JPS58101493A (https=)
DE (1) DE3275789D1 (https=)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987000686A1 (fr) * 1985-07-16 1987-01-29 Nippon Telegraph And Telephone Corporation Bornes de connection entre des substrats et procede de production

Families Citing this family (49)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS58169942A (ja) * 1982-03-29 1983-10-06 Fujitsu Ltd 半導体装置
JPS61296800A (ja) * 1985-06-25 1986-12-27 日本電気株式会社 設計変更用電極
US5917707A (en) 1993-11-16 1999-06-29 Formfactor, Inc. Flexible contact structure with an electrically conductive shell
US4706166A (en) * 1986-04-25 1987-11-10 Irvine Sensors Corporation High-density electronic modules--process and product
US4873615A (en) * 1986-10-09 1989-10-10 Amp Incorporated Semiconductor chip carrier system
US4837928A (en) * 1986-10-17 1989-06-13 Cominco Ltd. Method of producing a jumper chip for semiconductor devices
US5189507A (en) * 1986-12-17 1993-02-23 Raychem Corporation Interconnection of electronic components
US4955523A (en) * 1986-12-17 1990-09-11 Raychem Corporation Interconnection of electronic components
US4860443A (en) * 1987-01-21 1989-08-29 Hughes Aircraft Company Method for connecting leadless chip package
DE3704200A1 (de) * 1987-02-11 1988-08-25 Bbc Brown Boveri & Cie Verfahren zur herstellung einer verbindung zwischen einem bonddraht und einer kontaktflaeche bei hybriden dickschicht-schaltkreisen
JPS63158863U (https=) * 1987-04-07 1988-10-18
DE3817600C2 (de) * 1987-05-26 1994-06-23 Matsushita Electric Works Ltd Verfahren zur Herstellung einer Halbleitervorrichtung mit einem keramischen Substrat und einem integrierten Schaltungskreis
JP2673993B2 (ja) * 1990-07-02 1997-11-05 日本無線株式会社 表面弾性波装置
US5274531A (en) * 1991-06-17 1993-12-28 The Intec Group, Inc. Lead frame with aluminum rivets
SE9202077L (sv) * 1992-07-06 1994-01-07 Ellemtel Utvecklings Ab Komponentmodul
JP2783093B2 (ja) * 1992-10-21 1998-08-06 日本電気株式会社 プリント配線板
US20020053734A1 (en) 1993-11-16 2002-05-09 Formfactor, Inc. Probe card assembly and kit, and methods of making same
US7073254B2 (en) 1993-11-16 2006-07-11 Formfactor, Inc. Method for mounting a plurality of spring contact elements
US5820014A (en) 1993-11-16 1998-10-13 Form Factor, Inc. Solder preforms
US5455390A (en) * 1994-02-01 1995-10-03 Tessera, Inc. Microelectronics unit mounting with multiple lead bonding
US6117694A (en) * 1994-07-07 2000-09-12 Tessera, Inc. Flexible lead structures and methods of making same
US5798286A (en) * 1995-09-22 1998-08-25 Tessera, Inc. Connecting multiple microelectronic elements with lead deformation
US5830782A (en) * 1994-07-07 1998-11-03 Tessera, Inc. Microelectronic element bonding with deformation of leads in rows
US5688716A (en) 1994-07-07 1997-11-18 Tessera, Inc. Fan-out semiconductor chip assembly
US5518964A (en) * 1994-07-07 1996-05-21 Tessera, Inc. Microelectronic mounting with multiple lead deformation and bonding
US6828668B2 (en) * 1994-07-07 2004-12-07 Tessera, Inc. Flexible lead structures and methods of making same
US6429112B1 (en) 1994-07-07 2002-08-06 Tessera, Inc. Multi-layer substrates and fabrication processes
US6848173B2 (en) * 1994-07-07 2005-02-01 Tessera, Inc. Microelectric packages having deformed bonded leads and methods therefor
US6204074B1 (en) 1995-01-09 2001-03-20 International Business Machines Corporation Chip design process for wire bond and flip-chip package
US5844317A (en) * 1995-12-21 1998-12-01 International Business Machines Corporation Consolidated chip design for wire bond and flip-chip package technologies
US7166495B2 (en) * 1996-02-20 2007-01-23 Micron Technology, Inc. Method of fabricating a multi-die semiconductor package assembly
US5696031A (en) * 1996-11-20 1997-12-09 Micron Technology, Inc. Device and method for stacking wire-bonded integrated circuit dice on flip-chip bonded integrated circuit dice
US8033838B2 (en) 1996-02-21 2011-10-11 Formfactor, Inc. Microelectronic contact structure
US5994152A (en) 1996-02-21 1999-11-30 Formfactor, Inc. Fabricating interconnects and tips using sacrificial substrates
GB2356490B (en) * 1996-08-27 2001-08-15 Nec Corp A multi-chip module mountable on a printed circuit board
US5969417A (en) * 1996-08-27 1999-10-19 Nec Corporation Chip package device mountable on a mother board in whichever of facedown and wire bonding manners
US6133072A (en) * 1996-12-13 2000-10-17 Tessera, Inc. Microelectronic connector with planar elastomer sockets
US5907769A (en) * 1996-12-30 1999-05-25 Micron Technology, Inc. Leads under chip in conventional IC package
JP3681542B2 (ja) * 1998-07-01 2005-08-10 富士通株式会社 プリント回路基板および多段バンプ用中継基板
US6373143B1 (en) 1998-09-24 2002-04-16 International Business Machines Corporation Integrated circuit having wirebond pads suitable for probing
JP3778773B2 (ja) * 2000-05-09 2006-05-24 三洋電機株式会社 板状体および半導体装置の製造方法
US6395994B1 (en) * 2000-01-31 2002-05-28 Visteon Global Technologies, Inc. Etched tri-metal with integrated wire traces for wire bonding
US7173336B2 (en) * 2000-01-31 2007-02-06 Sanyo Electric Co., Ltd. Hybrid integrated circuit device
US6611434B1 (en) * 2000-10-30 2003-08-26 Siliconware Precision Industries Co., Ltd. Stacked multi-chip package structure with on-chip integration of passive component
US7112873B2 (en) * 2004-09-03 2006-09-26 Honeywell International Inc. Flip chip metal bonding to plastic leadframe
US8125060B2 (en) 2006-12-08 2012-02-28 Infineon Technologies Ag Electronic component with layered frame
US9269681B2 (en) 2012-11-16 2016-02-23 Qualcomm Incorporated Surface finish on trace for a thermal compression flip chip (TCFC)
US11239158B1 (en) * 2020-10-08 2022-02-01 Qualcomm Incorporated Wire bond inductor structures for flip chip dies
CN121215638A (zh) * 2025-09-24 2025-12-26 无锡中微高科电子有限公司 一种异质芯片集成的高温封装结构及其封装方法

Family Cites Families (11)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US3554821A (en) * 1967-07-17 1971-01-12 Rca Corp Process for manufacturing microminiature electrical component mounting assemblies
US3544704A (en) * 1969-01-21 1970-12-01 Motorola Inc Bonding islands for hybrid circuits
US3591839A (en) * 1969-08-27 1971-07-06 Siliconix Inc Micro-electronic circuit with novel hermetic sealing structure and method of manufacture
DE2032872B2 (de) * 1970-07-02 1975-03-20 Siemens Ag, 1000 Berlin Und 8000 Muenchen Verfahren zum Herstellen weichlötfähiger Kontakte zum Einbau von Halbleiterbauelementen in Gehäuse
DE2044494B2 (de) * 1970-09-08 1972-01-13 Siemens AG, 1000 Berlin u 8000 München Anschlussflaechen zum anloeten von halbleiterbausteinen in flip chip technik
US3778530A (en) * 1971-04-01 1973-12-11 W Reimann Flatpack lead positioning device
US3809797A (en) * 1971-11-16 1974-05-07 Du Pont Seal ring compositions and electronic packages made therewith
US3781596A (en) * 1972-07-07 1973-12-25 R Galli Semiconductor chip carriers and strips thereof
US4074342A (en) * 1974-12-20 1978-02-14 International Business Machines Corporation Electrical package for lsi devices and assembly process therefor
JPS5237744A (en) * 1975-09-19 1977-03-23 Seiko Epson Corp Electronic desk computer with liquid crystal display
US4179802A (en) * 1978-03-27 1979-12-25 International Business Machines Corporation Studded chip attachment process

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1987000686A1 (fr) * 1985-07-16 1987-01-29 Nippon Telegraph And Telephone Corporation Bornes de connection entre des substrats et procede de production
US4897918A (en) * 1985-07-16 1990-02-06 Nippon Telegraph And Telephone Method of manufacturing an interboard connection terminal

Also Published As

Publication number Publication date
US4447857A (en) 1984-05-08
DE3275789D1 (en) 1987-04-23
JPS6352776B2 (https=) 1988-10-20
EP0081135B1 (en) 1987-03-18
EP0081135A3 (en) 1984-07-25
EP0081135A2 (en) 1983-06-15

Similar Documents

Publication Publication Date Title
JPS58101493A (ja) 基板
US6303992B1 (en) Interposer for mounting semiconductor dice on substrates
US6133626A (en) Three dimensional packaging configuration for multi-chip module assembly
JPH09199535A (ja) 半導体集積回路の電極構造およびそのパッケージ形成方法
JP2002009433A (ja) 高密度カラム・グリッド・アレイ接続とその作製方法
JPH09283695A (ja) 半導体実装構造
WO2003005445A1 (en) Semiconductor device and semiconductor module
US6285562B1 (en) Method of contacting a chip
JP4876618B2 (ja) 半導体装置および半導体装置の製造方法
JPH03255657A (ja) 混成集積回路装置
JP2651608B2 (ja) 電子部品搭載用基板
JPS59211253A (ja) 電子部品パツケ−ジ
JP3360492B2 (ja) 電子回路基板
JP3297959B2 (ja) 半導体装置
JPS60138948A (ja) 半導体装置用パツケ−ジ
JPH0955447A (ja) 半導体装置
JP2001177038A (ja) リードピン付き配線基板およびリードピン付き電子部品
JP2623952B2 (ja) 集積回路パッケージ
JP2002076265A (ja) 半導体デバイスの実装方法、半導体デバイス及び半導体装置
JPH0436115Y2 (https=)
JP3067364B2 (ja) 金属突起電極付き半導体装置
JP2002118132A (ja) 電子部品の実装方法
JPH03171745A (ja) ハイブリッド集積回路のマウント構造
JPH0574853A (ja) 半導体装置の接続構造
JPS59165446A (ja) 集積回路構造体