JPS5780871A - Video signal binary circuit in photoelectric conversion system - Google Patents
Video signal binary circuit in photoelectric conversion systemInfo
- Publication number
- JPS5780871A JPS5780871A JP55156452A JP15645280A JPS5780871A JP S5780871 A JPS5780871 A JP S5780871A JP 55156452 A JP55156452 A JP 55156452A JP 15645280 A JP15645280 A JP 15645280A JP S5780871 A JPS5780871 A JP S5780871A
- Authority
- JP
- Japan
- Prior art keywords
- peak value
- video signal
- level
- comparator
- inputted
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/403—Discrimination between the two tones in the picture signal of a two-tone original
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Facsimile Image Signal Circuits (AREA)
Abstract
PURPOSE:To prevent a white part in a black picture to obtain accurate picture information, by inhibiting a down clock, which lowers the peak value of a video signal, when this peak value is lowered to a certain voltage level. CONSTITUTION:The peak value level from an output terminal of a video signal binary LSI 21 is inputted to the - terminal of a comparator 22, and a level voltage divided by resistances is inputted to the + terminal. When the peak value voltage is lower than the comparison voltage, the comparator 22 outputs an H- level output to the output terminal. The output of the comparator 22 is inputted to one input of an OR circuit 23, and a down clock signal is inputted to the other input to inhibit the down clock for the H-level output of the comparator 22. Thus, the peak value is prevented from being lowered more than the comparison voltage to secure the black picture.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55156452A JPS5780871A (en) | 1980-11-08 | 1980-11-08 | Video signal binary circuit in photoelectric conversion system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP55156452A JPS5780871A (en) | 1980-11-08 | 1980-11-08 | Video signal binary circuit in photoelectric conversion system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5780871A true JPS5780871A (en) | 1982-05-20 |
Family
ID=15628050
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP55156452A Pending JPS5780871A (en) | 1980-11-08 | 1980-11-08 | Video signal binary circuit in photoelectric conversion system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5780871A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5027117A (en) * | 1988-03-31 | 1991-06-25 | Ricoh Company, Ltd. | Conversion using a variable reference based on image density |
-
1980
- 1980-11-08 JP JP55156452A patent/JPS5780871A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US5027117A (en) * | 1988-03-31 | 1991-06-25 | Ricoh Company, Ltd. | Conversion using a variable reference based on image density |
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