JPS5734245A - Operation processing device - Google Patents

Operation processing device

Info

Publication number
JPS5734245A
JPS5734245A JP10964680A JP10964680A JPS5734245A JP S5734245 A JPS5734245 A JP S5734245A JP 10964680 A JP10964680 A JP 10964680A JP 10964680 A JP10964680 A JP 10964680A JP S5734245 A JPS5734245 A JP S5734245A
Authority
JP
Japan
Prior art keywords
clock
frequency
supplied
mupc2
power consumption
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP10964680A
Other languages
Japanese (ja)
Inventor
Shigeru Toyoshima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Individual
Original Assignee
Individual
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Individual filed Critical Individual
Priority to JP10964680A priority Critical patent/JPS5734245A/en
Publication of JPS5734245A publication Critical patent/JPS5734245A/en
Pending legal-status Critical Current

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F1/00Details not covered by groups G06F3/00 - G06F13/00 and G06F21/00
    • G06F1/26Power supply means, e.g. regulation thereof
    • G06F1/32Means for saving power

Abstract

PURPOSE:To reduce a quantity of electric power consumption by selecting the lowest frequency of clock frequencies necessary for the operation at each operation processing and by subjecting to actuation. CONSTITUTION:A clock signal from a clock signal source 1 is supplied to a divider 3, and clock pulses f1, f2,-fn with frequencies different from each other are generated to be supplied to a multiplexer MX4. The MX4 selects a clock with an appropriate frequency among the pulses f1-fn and supplies it to a microprocessor muPC2. The MX4 is connected via an input-output device 8 to the muPC2, and the lowest frequency adequate to the processing action among the clocks f1-fn is selected by a command signal read from an ROM6. In this case, a clock of the lowest frequency for an input from a keyboard 11, a clock of intermediate frequency for an indicator 12 and a clock of the highest frequency for CPU5 are selected and supplied. Consequently, a quantity of power consumption is reduced largely as compared with the case operated entirely with the highest frequency.
JP10964680A 1980-08-09 1980-08-09 Operation processing device Pending JPS5734245A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10964680A JPS5734245A (en) 1980-08-09 1980-08-09 Operation processing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10964680A JPS5734245A (en) 1980-08-09 1980-08-09 Operation processing device

Publications (1)

Publication Number Publication Date
JPS5734245A true JPS5734245A (en) 1982-02-24

Family

ID=14515556

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10964680A Pending JPS5734245A (en) 1980-08-09 1980-08-09 Operation processing device

Country Status (1)

Country Link
JP (1) JPS5734245A (en)

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995624A (en) * 1982-11-24 1984-06-01 Matsushita Electric Ind Co Ltd Power consumption reducing device of computer
JPS60502274A (en) * 1983-11-07 1985-12-26 モトロ−ラ・インコ−ポレ−テツド Synthetic clock microcomputer saves power
JPS62166419A (en) * 1986-01-17 1987-07-22 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Multifrequency clock generator
JPH0358207A (en) * 1989-07-27 1991-03-13 Nec Corp Microcomputer
EP0472285A2 (en) * 1990-08-20 1992-02-26 Advanced Micro Devices, Inc. External memory access control for a processing system
FR2731091A1 (en) * 1995-02-21 1996-08-30 United Microelectronics Corp Computer power=saving mode during data input
EP0794481A2 (en) * 1996-03-06 1997-09-10 Mitsubishi Denki Kabushiki Kaisha Multitask processing system with variable clock rate for power saving
US6466073B1 (en) 2000-04-12 2002-10-15 Mitsubishi Denki Kabushiki Kaisha Method and circuitry for generating clock
US6614865B1 (en) 1999-07-19 2003-09-02 Mitsubishi Denki Kabushiki Kaisha Phase-shift-resistant, frequency variable clock generator
US6771100B2 (en) 2001-06-29 2004-08-03 Renesas Technology Corp. Clock control circuit

Cited By (14)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5995624A (en) * 1982-11-24 1984-06-01 Matsushita Electric Ind Co Ltd Power consumption reducing device of computer
JPH0412842B2 (en) * 1983-11-07 1992-03-05 Motorola Inc
JPS60502274A (en) * 1983-11-07 1985-12-26 モトロ−ラ・インコ−ポレ−テツド Synthetic clock microcomputer saves power
JPS62166419A (en) * 1986-01-17 1987-07-22 インタ−ナショナル ビジネス マシ−ンズ コ−ポレ−ション Multifrequency clock generator
JPH0458048B2 (en) * 1986-01-17 1992-09-16 Intaanashonaru Bijinesu Mashiinzu Corp
JPH0358207A (en) * 1989-07-27 1991-03-13 Nec Corp Microcomputer
EP0472285A2 (en) * 1990-08-20 1992-02-26 Advanced Micro Devices, Inc. External memory access control for a processing system
US5481690A (en) * 1990-08-20 1996-01-02 Advanced Micro Devices, Inc. Power-efficient external memory access control using external memory enable time durations independent of external memory accessing rate
FR2731091A1 (en) * 1995-02-21 1996-08-30 United Microelectronics Corp Computer power=saving mode during data input
EP0794481A2 (en) * 1996-03-06 1997-09-10 Mitsubishi Denki Kabushiki Kaisha Multitask processing system with variable clock rate for power saving
EP0794481A3 (en) * 1996-03-06 1999-04-07 Mitsubishi Denki Kabushiki Kaisha Multitask processing system with variable clock rate for power saving
US6614865B1 (en) 1999-07-19 2003-09-02 Mitsubishi Denki Kabushiki Kaisha Phase-shift-resistant, frequency variable clock generator
US6466073B1 (en) 2000-04-12 2002-10-15 Mitsubishi Denki Kabushiki Kaisha Method and circuitry for generating clock
US6771100B2 (en) 2001-06-29 2004-08-03 Renesas Technology Corp. Clock control circuit

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