JPS5728474A - Picture processing system - Google Patents
Picture processing systemInfo
- Publication number
- JPS5728474A JPS5728474A JP10325880A JP10325880A JPS5728474A JP S5728474 A JPS5728474 A JP S5728474A JP 10325880 A JP10325880 A JP 10325880A JP 10325880 A JP10325880 A JP 10325880A JP S5728474 A JPS5728474 A JP S5728474A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- differences
- density
- maximum value
- sum
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N1/00—Scanning, transmission or reproduction of documents or the like, e.g. facsimile transmission; Details thereof
- H04N1/40—Picture signal circuits
- H04N1/403—Discrimination between the two tones in the picture signal of a two-tone original
Abstract
PURPOSE:To avoid the missing of required picture information and remained noise component, by setting optimum threshold level at all times regardless of the state of background of an original. CONSTITUTION:A picture information in a specific picture element region is temporarily stored in a multi-information storage circuit 1. The maximum value and the average value of the stored content are detected at each level detection circuit 2, 3, and the difference is calculated at a subtractor 4. At the same time, the content of the circuit 1 is transmitted to an operation circuit 5, where the sum of differences at specific picture element regions is sequentially calculated, the result of calculation is given to a storage circuit 6 of sum of differences on density, and it is added and stored in a register section on each density respectively to obtain the total sum of differences on density. A maximum value detection circuit 7 detects the maximum value of the total sum of differences on density. An operation circuit 8 calculates an optimum threshold level based on the output and it is given to a binary circuit 9.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10325880A JPS5728474A (en) | 1980-07-28 | 1980-07-28 | Picture processing system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP10325880A JPS5728474A (en) | 1980-07-28 | 1980-07-28 | Picture processing system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5728474A true JPS5728474A (en) | 1982-02-16 |
Family
ID=14349410
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP10325880A Pending JPS5728474A (en) | 1980-07-28 | 1980-07-28 | Picture processing system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5728474A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0160363A2 (en) * | 1984-04-28 | 1985-11-06 | Kabushiki Kaisha Toshiba | Binarizing system of picture image signals |
-
1980
- 1980-07-28 JP JP10325880A patent/JPS5728474A/en active Pending
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0160363A2 (en) * | 1984-04-28 | 1985-11-06 | Kabushiki Kaisha Toshiba | Binarizing system of picture image signals |
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