JPS5728129B2 - - Google Patents
Info
- Publication number
- JPS5728129B2 JPS5728129B2 JP1365879A JP1365879A JPS5728129B2 JP S5728129 B2 JPS5728129 B2 JP S5728129B2 JP 1365879 A JP1365879 A JP 1365879A JP 1365879 A JP1365879 A JP 1365879A JP S5728129 B2 JPS5728129 B2 JP S5728129B2
- Authority
- JP
- Japan
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1365879A JPS55105732A (en) | 1979-02-08 | 1979-02-08 | Multiplier |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP1365879A JPS55105732A (en) | 1979-02-08 | 1979-02-08 | Multiplier |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS55105732A JPS55105732A (en) | 1980-08-13 |
JPS5728129B2 true JPS5728129B2 (en) | 1982-06-15 |
Family
ID=11839295
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP1365879A Granted JPS55105732A (en) | 1979-02-08 | 1979-02-08 | Multiplier |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS55105732A (en) |
Families Citing this family (9)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5856033A (en) * | 1981-09-29 | 1983-04-02 | Fujitsu Ltd | Multiplying circuit |
JPS593634A (en) * | 1982-06-30 | 1984-01-10 | Fujitsu Ltd | Multiplier |
JPS59208644A (en) * | 1983-05-12 | 1984-11-27 | Nec Corp | Data processor |
EP0174397A3 (en) * | 1983-08-05 | 1986-09-24 | Texas Instruments Incorporated | Dummy load controlled multi-level logic single clock logic circuit |
JPS61156433A (en) * | 1984-12-28 | 1986-07-16 | Toshiba Corp | Parallel multiplier |
DE69130652T2 (en) * | 1990-03-20 | 1999-05-06 | Fujitsu Ltd | Digital high speed parallel multiplier |
JP2600591B2 (en) * | 1993-11-19 | 1997-04-16 | 日本電気株式会社 | Multiplier |
JP3678512B2 (en) | 1996-08-29 | 2005-08-03 | 富士通株式会社 | Multiplier circuit, adder circuit constituting the multiplier circuit, partial product bit compression method of the multiplier circuit, and large-scale semiconductor integrated circuit to which the multiplier circuit is applied |
KR100477509B1 (en) * | 2002-10-02 | 2005-03-17 | 전자부품연구원 | Radix-4 booth encoder/decoder for fast arithmetic unit |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4886448A (en) * | 1972-02-16 | 1973-11-15 | ||
JPS52128026A (en) * | 1976-04-21 | 1977-10-27 | Nec Corp | Multi-input adding circuit for multiplication |
-
1979
- 1979-02-08 JP JP1365879A patent/JPS55105732A/en active Granted
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS4886448A (en) * | 1972-02-16 | 1973-11-15 | ||
JPS52128026A (en) * | 1976-04-21 | 1977-10-27 | Nec Corp | Multi-input adding circuit for multiplication |
Also Published As
Publication number | Publication date |
---|---|
JPS55105732A (en) | 1980-08-13 |