JPS57204663A - Carrier wave detecting system - Google Patents

Carrier wave detecting system

Info

Publication number
JPS57204663A
JPS57204663A JP56089183A JP8918381A JPS57204663A JP S57204663 A JPS57204663 A JP S57204663A JP 56089183 A JP56089183 A JP 56089183A JP 8918381 A JP8918381 A JP 8918381A JP S57204663 A JPS57204663 A JP S57204663A
Authority
JP
Japan
Prior art keywords
carrier wave
output
pcm codes
counter
wave detecting
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56089183A
Other languages
Japanese (ja)
Inventor
Teruyoshi Mita
Takao Sakata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56089183A priority Critical patent/JPS57204663A/en
Publication of JPS57204663A publication Critical patent/JPS57204663A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/10—Frequency-modulated carrier systems, i.e. using frequency-shift keying
    • H04L27/14—Demodulator circuits; Receiver circuits

Abstract

PURPOSE:To obtain a simple constituted and economical carrier wave detecting means, by decoding signals obtained by converting FSK modulated waves into PCM codes. CONSTITUTION:Information converted into 8-bit PCM codes is sent to a register 2 from a digital network 1. A NAND gate 3 is for detecting PCM codes above a specified level in the register 2, and its output is stored in a flip flop 4. The output of the flip flop 4 is inputted into an exclusive-OR cirit 5 and the output of the circuit 5 is used for controlling the operating condition of a counter 6. The circuit composed of the exclusive-OR circuit 5 and the counter 6 is for outputting a carrier wave detection signal CD ''1'' to the output of the counter 6 when PCM codes above a prescribed level are continued for more than a prescribed period. This means that the carrier wave detecting signal CD is turned to ''0'' only when PCM codes below a prescribed level are continued for a prescribed period.
JP56089183A 1981-06-10 1981-06-10 Carrier wave detecting system Pending JPS57204663A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56089183A JPS57204663A (en) 1981-06-10 1981-06-10 Carrier wave detecting system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56089183A JPS57204663A (en) 1981-06-10 1981-06-10 Carrier wave detecting system

Publications (1)

Publication Number Publication Date
JPS57204663A true JPS57204663A (en) 1982-12-15

Family

ID=13963626

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56089183A Pending JPS57204663A (en) 1981-06-10 1981-06-10 Carrier wave detecting system

Country Status (1)

Country Link
JP (1) JPS57204663A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4622481A (en) * 1985-08-21 1986-11-11 Rca Corporation Digital envelope detection circuit

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4622481A (en) * 1985-08-21 1986-11-11 Rca Corporation Digital envelope detection circuit

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