JPS57201000A - Bit shift control system of sequential access memory - Google Patents

Bit shift control system of sequential access memory

Info

Publication number
JPS57201000A
JPS57201000A JP56086124A JP8612481A JPS57201000A JP S57201000 A JPS57201000 A JP S57201000A JP 56086124 A JP56086124 A JP 56086124A JP 8612481 A JP8612481 A JP 8612481A JP S57201000 A JPS57201000 A JP S57201000A
Authority
JP
Japan
Prior art keywords
memory unit
faulty position
data
position information
bit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56086124A
Other languages
Japanese (ja)
Inventor
Kazuo Fujisaki
Kiyokatsu Iijima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP56086124A priority Critical patent/JPS57201000A/en
Publication of JPS57201000A publication Critical patent/JPS57201000A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G11—INFORMATION STORAGE
    • G11C—STATIC STORES
    • G11C29/00—Checking stores for correct operation ; Subsequent repair; Testing stores during standby or offline operation
    • G11C29/70—Masking faults in memories by using spares or by reconfiguring
    • G11C29/76—Masking faults in memories by using spares or by reconfiguring using address translation or modifications

Landscapes

  • Techniques For Improving Reliability Of Storages (AREA)

Abstract

PURPOSE:To simultaneously write or read out a data of plural bits, by storing a faulty position information in a faulty position memory, and shifting a bit read out from a memory unit part, to a bit read out from an auxiliary memory unit, in case when a faulty position exists. CONSTITUTION:This system is provided with a memory unit part 10 having plural sequential access memory units, an auxiliary memory unit 11 and a faulty position memory 3. In accordance with an access address information to the memory unit part 10, a faulty position information is read out by the faulty position memory 3, and when writing a data, if the faulty position information shows that a faulty position exists in the memory unit part 10, a bit corresponding to the faulty position information in the write data is written in the auxiliary memory unit 11. On the oher hand, when reading out a data, a bit corresponding to the faulty position information in the read-out data from the memory unit is shifted to a bit from the auxiliary memory unit 11, and is sent out.
JP56086124A 1981-06-04 1981-06-04 Bit shift control system of sequential access memory Pending JPS57201000A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56086124A JPS57201000A (en) 1981-06-04 1981-06-04 Bit shift control system of sequential access memory

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56086124A JPS57201000A (en) 1981-06-04 1981-06-04 Bit shift control system of sequential access memory

Publications (1)

Publication Number Publication Date
JPS57201000A true JPS57201000A (en) 1982-12-09

Family

ID=13877948

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56086124A Pending JPS57201000A (en) 1981-06-04 1981-06-04 Bit shift control system of sequential access memory

Country Status (1)

Country Link
JP (1) JPS57201000A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012128910A (en) * 2010-12-15 2012-07-05 Fujitsu Ltd Semiconductor memory, and manufacturing method

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2012128910A (en) * 2010-12-15 2012-07-05 Fujitsu Ltd Semiconductor memory, and manufacturing method
US9384860B2 (en) 2010-12-15 2016-07-05 Fujitsu Limited Semiconductor memory of which defective cell is replaceable with redundant cell and manufacturing method of semiconductor memory

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