JPS57193066A - Eprom device - Google Patents

Eprom device

Info

Publication number
JPS57193066A
JPS57193066A JP57051240A JP5124082A JPS57193066A JP S57193066 A JPS57193066 A JP S57193066A JP 57051240 A JP57051240 A JP 57051240A JP 5124082 A JP5124082 A JP 5124082A JP S57193066 A JPS57193066 A JP S57193066A
Authority
JP
Japan
Prior art keywords
circuit
series
decoder
address buffer
adb1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP57051240A
Other languages
Japanese (ja)
Other versions
JPH0157508B2 (en
Inventor
Minoru Fukuda
Shigeru Yamatani
Kotaro Nishimura
Akira Endo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP57051240A priority Critical patent/JPS57193066A/en
Publication of JPS57193066A publication Critical patent/JPS57193066A/en
Publication of JPH0157508B2 publication Critical patent/JPH0157508B2/ja
Granted legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Ceramic Engineering (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Read Only Memory (AREA)
  • Semiconductor Memories (AREA)
  • Non-Volatile Memory (AREA)

Abstract

PURPOSE:To reduce a leakage current of an EPROM device and to reduce the size of the device by composing the device of an address buffer circuit, a decoder circuit, a memory array circuit, a wiring circuit, a column switch circuit and the like. CONSTITUTION:An X-address buffer circuit ADB1, an X-decoder circuit X-DEC and memory array circuits MAR0-MAR7 are connected in series with each other, and address input terminals A5-A12 are provided at the circuit ADB1. A Y-address buffer circuit ADB2, Y-decoder circuit Y-DEC1 and column switches CS0-CS7 are similarly connected in series with each other, and input terminals A0-A4 are mounted at the circuit ADB2. Further, Y-decoder circuit Y-DEC2 and writing circuit R/W0-R/W7 are provided in series with each other, these three groups are connected to each other, and the circuit Y-DEC2 and the circuit R/W0-R/W0 are controlled by a controller CONT to which a control input signal is inputted. In this manner, the entire device is formed in IC, and a writing power terminal VPP, a power terminal VCC, and a grounded reference terminal GND are connected to the device.
JP57051240A 1982-03-31 1982-03-31 Eprom device Granted JPS57193066A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP57051240A JPS57193066A (en) 1982-03-31 1982-03-31 Eprom device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP57051240A JPS57193066A (en) 1982-03-31 1982-03-31 Eprom device

Related Parent Applications (1)

Application Number Title Priority Date Filing Date
JP7651981A Division JPS57192067A (en) 1981-05-22 1981-05-22 Erasable and programmable read only memory unit

Publications (2)

Publication Number Publication Date
JPS57193066A true JPS57193066A (en) 1982-11-27
JPH0157508B2 JPH0157508B2 (en) 1989-12-06

Family

ID=12881416

Family Applications (1)

Application Number Title Priority Date Filing Date
JP57051240A Granted JPS57193066A (en) 1982-03-31 1982-03-31 Eprom device

Country Status (1)

Country Link
JP (1) JPS57193066A (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154692A (en) * 1983-02-23 1984-09-03 Toshiba Corp Semiconductor storage device
JPS6052999A (en) * 1983-07-11 1985-03-26 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Memory device
JPS6070596A (en) * 1983-09-28 1985-04-22 Hitachi Micro Comput Eng Ltd Semiconductor storage device
US5058071A (en) * 1988-11-21 1991-10-15 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having means for repairing the memory device with respect to possible defective memory portions
US5126808A (en) * 1989-10-23 1992-06-30 Advanced Micro Devices, Inc. Flash EEPROM array with paged erase architecture

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59154692A (en) * 1983-02-23 1984-09-03 Toshiba Corp Semiconductor storage device
JPS6052999A (en) * 1983-07-11 1985-03-26 エヌ・ベ−・フイリツプス・フル−イランペンフアブリケン Memory device
JPS6070596A (en) * 1983-09-28 1985-04-22 Hitachi Micro Comput Eng Ltd Semiconductor storage device
US5058071A (en) * 1988-11-21 1991-10-15 Mitsubishi Denki Kabushiki Kaisha Semiconductor memory device having means for repairing the memory device with respect to possible defective memory portions
US5126808A (en) * 1989-10-23 1992-06-30 Advanced Micro Devices, Inc. Flash EEPROM array with paged erase architecture

Also Published As

Publication number Publication date
JPH0157508B2 (en) 1989-12-06

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