JPS57190346A - Integrated circuit device - Google Patents

Integrated circuit device

Info

Publication number
JPS57190346A
JPS57190346A JP7590381A JP7590381A JPS57190346A JP S57190346 A JPS57190346 A JP S57190346A JP 7590381 A JP7590381 A JP 7590381A JP 7590381 A JP7590381 A JP 7590381A JP S57190346 A JPS57190346 A JP S57190346A
Authority
JP
Japan
Prior art keywords
fet
output terminal
closed
substrate
generated
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7590381A
Other languages
Japanese (ja)
Inventor
Kenji Ichida
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP7590381A priority Critical patent/JPS57190346A/en
Publication of JPS57190346A publication Critical patent/JPS57190346A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/0203Particular design considerations for integrated circuits
    • H01L27/0248Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection
    • H01L27/0251Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices
    • H01L27/0266Particular design considerations for integrated circuits for electrical or thermal protection, e.g. electrostatic discharge [ESD] protection for MOS devices using field effect transistors as protective elements

Abstract

PURPOSE:To obtain the sufficient preventing effect of electrostatic destruction of an integrated circuit device without destroying the characteristic by a method wherein an input terminal of normally closed junction type FET is connected to an input/output terminal of IC, the output terminal thereof is connected to a substrate of the IC, and the FET is made to open after an electric power source for the IC is closed. CONSTITUTION:The input terminal of the normally closed junction type FET 2-6 is connected between the output buffer 2-2 and an output terminal 2-1, and the output terminal 2-1 of the FET 2-6 is connected to a VDD terminal. Because the FET 2-6 is closed normally before the electric power source is to be closed, the output terminal 2-1 is connected to the VDD terminal, namely to the IC substrate. When the electric power source is closed to the IC, because a gate of the FET 2-6 is earthed and the IC substrate has the voltage VDD, the FET 2-6 is made to OFF. While because the voltage to be generated on the output terminal is reduced owing to large electrostatic capacity of the substrate, electrostatic destruction of the FET is not generated, and because an outside wiring and an active element is connected thereto during operation, static electricity is hard to be generated and is easy to be discharged, and destruction to be generated by static electricity can be prevented.
JP7590381A 1981-05-20 1981-05-20 Integrated circuit device Pending JPS57190346A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7590381A JPS57190346A (en) 1981-05-20 1981-05-20 Integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7590381A JPS57190346A (en) 1981-05-20 1981-05-20 Integrated circuit device

Publications (1)

Publication Number Publication Date
JPS57190346A true JPS57190346A (en) 1982-11-22

Family

ID=13589755

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7590381A Pending JPS57190346A (en) 1981-05-20 1981-05-20 Integrated circuit device

Country Status (1)

Country Link
JP (1) JPS57190346A (en)

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