JPS57166737A - Logical circuit - Google Patents

Logical circuit

Info

Publication number
JPS57166737A
JPS57166737A JP56051412A JP5141281A JPS57166737A JP S57166737 A JPS57166737 A JP S57166737A JP 56051412 A JP56051412 A JP 56051412A JP 5141281 A JP5141281 A JP 5141281A JP S57166737 A JPS57166737 A JP S57166737A
Authority
JP
Japan
Prior art keywords
channel
potential
terminal
mostr2
mostr1
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP56051412A
Other languages
Japanese (ja)
Inventor
Yutaka Hayashi
Osamu Kondo
Akinori Tojo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56051412A priority Critical patent/JPS57166737A/en
Publication of JPS57166737A publication Critical patent/JPS57166737A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
    • H03K19/08—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices
    • H03K19/094—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors
    • H03K19/0944—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET
    • H03K19/0948—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using semiconductor devices using field-effect transistors using MOSFET or insulated gate field-effect transistors, i.e. IGFET using CMOS or complementary insulated gate field-effect transistors

Abstract

PURPOSE:To decrease the number of constituent elements and to reduce occupied area by composing an AND-OR circuit of one P (N) channel MOS transistor (TR) and N (P) channel MOSTRs. CONSTITUTION:A P channel MOSTR1 is in an on state all the time bacause its gate terminal is grounded, operating as a load resistance. When a positive voltage is inputted to an input terminal A while an N channel MOSTR2 is turned on, a positive voltage is developed at an output terminal D. Further, when the input signal terminal A is held at the ground potential, a potential level outputted to the output terminal D is obtained by dividing a difference in level between a power potential and an input potential at the resistance ratio of the P channel MOSTR1 and N channel MOSTR2, and the operation of an AND- OR circuit is realized according to the ratio gm of both the TRs.
JP56051412A 1981-04-06 1981-04-06 Logical circuit Pending JPS57166737A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56051412A JPS57166737A (en) 1981-04-06 1981-04-06 Logical circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56051412A JPS57166737A (en) 1981-04-06 1981-04-06 Logical circuit

Publications (1)

Publication Number Publication Date
JPS57166737A true JPS57166737A (en) 1982-10-14

Family

ID=12886209

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56051412A Pending JPS57166737A (en) 1981-04-06 1981-04-06 Logical circuit

Country Status (1)

Country Link
JP (1) JPS57166737A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577124A (en) * 1983-07-28 1986-03-18 Kabushiki Kaisha Toshiba CMOS Logic circuit
JPH01166618A (en) * 1987-12-23 1989-06-30 Toshiba Corp Logic circuit

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4911555A (en) * 1972-05-02 1974-02-01
JPS5143547B2 (en) * 1972-04-12 1976-11-22

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5143547B2 (en) * 1972-04-12 1976-11-22
JPS4911555A (en) * 1972-05-02 1974-02-01

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4577124A (en) * 1983-07-28 1986-03-18 Kabushiki Kaisha Toshiba CMOS Logic circuit
JPH01166618A (en) * 1987-12-23 1989-06-30 Toshiba Corp Logic circuit

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