JPS57155866A - Demodulation circuit for intermediate frequency signal - Google Patents

Demodulation circuit for intermediate frequency signal

Info

Publication number
JPS57155866A
JPS57155866A JP56041937A JP4193781A JPS57155866A JP S57155866 A JPS57155866 A JP S57155866A JP 56041937 A JP56041937 A JP 56041937A JP 4193781 A JP4193781 A JP 4193781A JP S57155866 A JPS57155866 A JP S57155866A
Authority
JP
Japan
Prior art keywords
carrier wave
frequency
band pass
inputted
pass filter
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56041937A
Other languages
Japanese (ja)
Other versions
JPS6338140B2 (en
Inventor
Osamu Ichiyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56041937A priority Critical patent/JPS57155866A/en
Publication of JPS57155866A publication Critical patent/JPS57155866A/en
Publication of JPS6338140B2 publication Critical patent/JPS6338140B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2273—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals associated with quadrature demodulation, e.g. Costas loop

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)

Abstract

PURPOSE:To achieve a demodulation circuit operated in excellent manner even at a reception IF signal system with greater frequency fluctuation, by providing a frequency tracking type band pass filter with an input circuit and controlling this band pass flter through the output of a carrier wave reproducing circuit. CONSTITUTION:An IF frequency signal is inputted to a frequency tracking type band pass filter 6, where noise component is rejected and inputted to a carrier wave reproducing circuit 1 and a demodulator 2 after passing through a limiter circuit 5. The carrier wave reproduced at a carrier wave reproducing circuit 1 is inputted to a control signal to the band pass filter 6 and a demodulation carrier wave to the demodulator 2. The frequency tracking type band pass filter 6 is as shown in figure, the IF frequency signal and the reproduced carrier wave are multiplied at multipliers 8 and 9, the IF frequency signal is converted into the base band, and after noise rejection at low pass filters 10 and 11, the reproduced carrier wave is inputted to multipliers 12 and 13, and output is made by converting the carrier wave into that in the IF frequency band again.
JP56041937A 1981-03-23 1981-03-23 Demodulation circuit for intermediate frequency signal Granted JPS57155866A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56041937A JPS57155866A (en) 1981-03-23 1981-03-23 Demodulation circuit for intermediate frequency signal

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56041937A JPS57155866A (en) 1981-03-23 1981-03-23 Demodulation circuit for intermediate frequency signal

Publications (2)

Publication Number Publication Date
JPS57155866A true JPS57155866A (en) 1982-09-27
JPS6338140B2 JPS6338140B2 (en) 1988-07-28

Family

ID=12622128

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56041937A Granted JPS57155866A (en) 1981-03-23 1981-03-23 Demodulation circuit for intermediate frequency signal

Country Status (1)

Country Link
JP (1) JPS57155866A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62107559A (en) * 1985-11-02 1987-05-18 Nec Corp Phase locked loop carrier recovery circuit
JP2007005931A (en) * 2005-06-21 2007-01-11 Mitsubishi Electric Corp Clock recovery circuit and method

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR102590687B1 (en) * 2023-04-12 2023-10-19 민훈기 Rail Fixing Structure

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS62107559A (en) * 1985-11-02 1987-05-18 Nec Corp Phase locked loop carrier recovery circuit
JP2007005931A (en) * 2005-06-21 2007-01-11 Mitsubishi Electric Corp Clock recovery circuit and method
JP4602170B2 (en) * 2005-06-21 2010-12-22 三菱電機株式会社 Clock recovery circuit and clock recovery method

Also Published As

Publication number Publication date
JPS6338140B2 (en) 1988-07-28

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