JPS57132463A - Phase synchronizing circuit - Google Patents

Phase synchronizing circuit

Info

Publication number
JPS57132463A
JPS57132463A JP56017394A JP1739481A JPS57132463A JP S57132463 A JPS57132463 A JP S57132463A JP 56017394 A JP56017394 A JP 56017394A JP 1739481 A JP1739481 A JP 1739481A JP S57132463 A JPS57132463 A JP S57132463A
Authority
JP
Japan
Prior art keywords
circuits
circuit
outputs
phase
output
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP56017394A
Other languages
English (en)
Japanese (ja)
Other versions
JPS6342993B2 (enrdf_load_stackoverflow
Inventor
Toshio Fujita
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP56017394A priority Critical patent/JPS57132463A/ja
Publication of JPS57132463A publication Critical patent/JPS57132463A/ja
Publication of JPS6342993B2 publication Critical patent/JPS6342993B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L27/00—Modulated-carrier systems
    • H04L27/18—Phase-modulated carrier systems, i.e. using phase-shift keying
    • H04L27/22—Demodulator circuits; Receiver circuits
    • H04L27/227—Demodulator circuits; Receiver circuits using coherent demodulation
    • H04L27/2271—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals
    • H04L27/2272—Demodulator circuits; Receiver circuits using coherent demodulation wherein the carrier recovery circuit uses only the demodulated signals using phase locked loops

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Digital Transmission Methods That Use Modulated Carrier Waves (AREA)
JP56017394A 1981-02-10 1981-02-10 Phase synchronizing circuit Granted JPS57132463A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP56017394A JPS57132463A (en) 1981-02-10 1981-02-10 Phase synchronizing circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP56017394A JPS57132463A (en) 1981-02-10 1981-02-10 Phase synchronizing circuit

Publications (2)

Publication Number Publication Date
JPS57132463A true JPS57132463A (en) 1982-08-16
JPS6342993B2 JPS6342993B2 (enrdf_load_stackoverflow) 1988-08-26

Family

ID=11942779

Family Applications (1)

Application Number Title Priority Date Filing Date
JP56017394A Granted JPS57132463A (en) 1981-02-10 1981-02-10 Phase synchronizing circuit

Country Status (1)

Country Link
JP (1) JPS57132463A (enrdf_load_stackoverflow)

Also Published As

Publication number Publication date
JPS6342993B2 (enrdf_load_stackoverflow) 1988-08-26

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