JPS57115833A - Polyimide resin film etching technique - Google Patents

Polyimide resin film etching technique

Info

Publication number
JPS57115833A
JPS57115833A JP205281A JP205281A JPS57115833A JP S57115833 A JPS57115833 A JP S57115833A JP 205281 A JP205281 A JP 205281A JP 205281 A JP205281 A JP 205281A JP S57115833 A JPS57115833 A JP S57115833A
Authority
JP
Japan
Prior art keywords
freon
plasma
polyimide resin
polyimide
oxygen
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP205281A
Other languages
Japanese (ja)
Inventor
Tsutomu Wada
Hiroyuki Shibata
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Nippon Telegraph and Telephone Corp
Original Assignee
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nippon Telegraph and Telephone Corp filed Critical Nippon Telegraph and Telephone Corp
Priority to JP205281A priority Critical patent/JPS57115833A/en
Publication of JPS57115833A publication Critical patent/JPS57115833A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/311—Etching the insulating layers by chemical or physical means
    • H01L21/31127—Etching organic layers
    • H01L21/31133—Etching organic layers by chemical means
    • H01L21/31138—Etching organic layers by chemical means by dry-etching

Landscapes

  • Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • Chemical & Material Sciences (AREA)
  • Manufacturing & Machinery (AREA)
  • General Chemical & Material Sciences (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Macromolecular Compounds Obtained By Forming Nitrogen-Containing Linkages In General (AREA)
  • Drying Of Semiconductors (AREA)
  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Polymers With Sulfur, Phosphorus Or Metals In The Main Chain (AREA)

Abstract

PURPOSE:To form a fine patterning without causing a polyimide layer to swell by a method wherein a polyimide covered substrate undergoes plasma etching first in Freon or a gas containing Freon and then in O2 or a gas containing O2. CONSTITUTION:A substrate is covered with a prescribed thickness of monomer polyimide resin varnish and then subjected to high temperature for the polymerization of the resin. A resist pattern is formed over the resultant resin layer, which then is plasma treated in Freon or a Freon containing gas. The surface layer of the resist is transformed and achieves a remarkably high resistance to oxygen plasma. The polyimide resin layer on the contrary is affected but a little and fails to present any noticeable changes in its resistance to the oxygen plasma. The substrate is then subjected to etching in a plasma of oxygen gas or a gas containing oxygen. The etching process in this environment making its way at very low speeds, a thin resist film can be used in the treatment of a polyimide resin layer.
JP205281A 1981-01-12 1981-01-12 Polyimide resin film etching technique Pending JPS57115833A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP205281A JPS57115833A (en) 1981-01-12 1981-01-12 Polyimide resin film etching technique

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP205281A JPS57115833A (en) 1981-01-12 1981-01-12 Polyimide resin film etching technique

Publications (1)

Publication Number Publication Date
JPS57115833A true JPS57115833A (en) 1982-07-19

Family

ID=11518558

Family Applications (1)

Application Number Title Priority Date Filing Date
JP205281A Pending JPS57115833A (en) 1981-01-12 1981-01-12 Polyimide resin film etching technique

Country Status (1)

Country Link
JP (1) JPS57115833A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057630A (en) * 1983-09-08 1985-04-03 Matsushita Electronics Corp Manufacture of semiconductor device
JPS60148122A (en) * 1984-01-13 1985-08-05 Toshiba Corp Plasma etching of organic matter insulating film

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6057630A (en) * 1983-09-08 1985-04-03 Matsushita Electronics Corp Manufacture of semiconductor device
JPS60148122A (en) * 1984-01-13 1985-08-05 Toshiba Corp Plasma etching of organic matter insulating film

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