JPS56169963A - Terminal controlling system - Google Patents

Terminal controlling system

Info

Publication number
JPS56169963A
JPS56169963A JP7395680A JP7395680A JPS56169963A JP S56169963 A JPS56169963 A JP S56169963A JP 7395680 A JP7395680 A JP 7395680A JP 7395680 A JP7395680 A JP 7395680A JP S56169963 A JPS56169963 A JP S56169963A
Authority
JP
Grant status
Application
Patent type
Prior art keywords
terminal device
registers
terminal
data
exchanger
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7395680A
Inventor
Masato Fujisawa
Yoshiharu Kamio
Kazuhiro Sato
Kiyoshi Shibuya
Yoshikazu Tanaka
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date

Links

Classifications

    • HELECTRICITY
    • H04ELECTRIC COMMUNICATION TECHNIQUE
    • H04MTELEPHONIC COMMUNICATION
    • H04M1/00Substation equipment, e.g. for use by subscribers; Analogous equipment at exchanges
    • H04M1/56Arrangements for indicating or recording the called number at the calling subscriber's set

Abstract

PURPOSE:To fetch the data block received finally to each terminal as the data of itself and to make extension of a terminal device easy, by providing shift registers to a terminal device connected to a telephone exchanger such as PBX and connecting the registers in cascade. CONSTITUTION:A terminal device A being a called party number display device is extended with a terminal device B for called party number display, and shift registers 12, 22 and data registers 18, 28 are provided in the terminal devices A, B, and the capacity of the registers 12, 22 is taken as one data block. Further, an input terminal 10 is connected to an exchanger FX, the registers 12, 22, 18 and 28 are in cascade connection, the terminal device A is provided with a clock reproduction circuit 14 and a timing forming circuit 16, and the terminal device B is controlled with the clock of the circuits 14 and 16 and the timing signal. Moreover, the data block finally received is receptible as the data of itself, allowing to remold the exchanger FX and to extend terminal devices B and C.
JP7395680A 1980-06-02 1980-06-02 Terminal controlling system Pending JPS56169963A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7395680A JPS56169963A (en) 1980-06-02 1980-06-02 Terminal controlling system

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7395680A JPS56169963A (en) 1980-06-02 1980-06-02 Terminal controlling system

Publications (1)

Publication Number Publication Date
JPS56169963A true true JPS56169963A (en) 1981-12-26

Family

ID=13533031

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7395680A Pending JPS56169963A (en) 1980-06-02 1980-06-02 Terminal controlling system

Country Status (1)

Country Link
JP (1) JPS56169963A (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447434A (en) * 1977-08-31 1979-04-14 Ncr Co Display system

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5447434A (en) * 1977-08-31 1979-04-14 Ncr Co Display system

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