JPS56101225A - Check system of initial state - Google Patents

Check system of initial state

Info

Publication number
JPS56101225A
JPS56101225A JP287880A JP287880A JPS56101225A JP S56101225 A JPS56101225 A JP S56101225A JP 287880 A JP287880 A JP 287880A JP 287880 A JP287880 A JP 287880A JP S56101225 A JPS56101225 A JP S56101225A
Authority
JP
Japan
Prior art keywords
line
state
gates
gate
clock signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP287880A
Other languages
Japanese (ja)
Inventor
Fumio Akiyoshi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Nippon Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, Nippon Electric Co Ltd filed Critical NEC Corp
Priority to JP287880A priority Critical patent/JPS56101225A/en
Publication of JPS56101225A publication Critical patent/JPS56101225A/en
Pending legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F11/00—Error detection; Error correction; Monitoring

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Quality & Reliability (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Debugging And Monitoring (AREA)
  • Test And Diagnosis Of Digital Computers (AREA)

Abstract

PURPOSE:To enable to prevent the system-down, by checking the on/off state of switches which are not to be on under on-line, when an electronic device transits to the on-line state. CONSTITUTION:When the control section 1 detects the transit to the on-line state, a comparison timing clock signal is delivered from the clock signal line t to operate the comparision gates 3-1-3-n. If one of maintenance panel switches A1-An in a maintenance panel 2 corresponding to switch lines a1-an is on, the gate corresponded in the gates 3-1-3-n is on, and the signal is fed via either one of output lines C1-Cn, logical sum is taken with an OR gate 4 and it is given to a failure transmission section 5, and the failure is informed to the operator with lamp or buzzer display.
JP287880A 1980-01-14 1980-01-14 Check system of initial state Pending JPS56101225A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP287880A JPS56101225A (en) 1980-01-14 1980-01-14 Check system of initial state

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP287880A JPS56101225A (en) 1980-01-14 1980-01-14 Check system of initial state

Publications (1)

Publication Number Publication Date
JPS56101225A true JPS56101225A (en) 1981-08-13

Family

ID=11541604

Family Applications (1)

Application Number Title Priority Date Filing Date
JP287880A Pending JPS56101225A (en) 1980-01-14 1980-01-14 Check system of initial state

Country Status (1)

Country Link
JP (1) JPS56101225A (en)

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