JPS554911A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS554911A JPS554911A JP7646678A JP7646678A JPS554911A JP S554911 A JPS554911 A JP S554911A JP 7646678 A JP7646678 A JP 7646678A JP 7646678 A JP7646678 A JP 7646678A JP S554911 A JPS554911 A JP S554911A
- Authority
- JP
- Japan
- Prior art keywords
- lead plates
- plates
- lead
- pair
- ears
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/48—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor
- H01L23/488—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
- H01L23/495—Lead-frames or other flat leads
- H01L23/49541—Geometry of the lead-frame
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/73—Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
- H01L2224/732—Location after the connecting process
- H01L2224/73251—Location after the connecting process on different surfaces
- H01L2224/73265—Layer and wire connectors
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/1515—Shape
- H01L2924/15153—Shape the die mounting substrate comprising a recess for hosting the device
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/15165—Monolayer substrate
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/161—Cap
- H01L2924/1615—Shape
- H01L2924/16152—Cap comprising a cavity for hosting the device, e.g. U-shaped cap
Landscapes
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Lead Frames For Integrated Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53076466A JPS603784B2 (ja) | 1978-06-26 | 1978-06-26 | リ−ドフレ−ム |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP53076466A JPS603784B2 (ja) | 1978-06-26 | 1978-06-26 | リ−ドフレ−ム |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS554911A true JPS554911A (en) | 1980-01-14 |
JPS603784B2 JPS603784B2 (ja) | 1985-01-30 |
Family
ID=13605933
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP53076466A Expired JPS603784B2 (ja) | 1978-06-26 | 1978-06-26 | リ−ドフレ−ム |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS603784B2 (ja) |
-
1978
- 1978-06-26 JP JP53076466A patent/JPS603784B2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPS603784B2 (ja) | 1985-01-30 |
Similar Documents
Publication | Publication Date | Title |
---|---|---|
IT8026298A0 (it) | Apparato per regolare la corrente fornita ad una linea telefonica. | |
IT8024697A0 (it) | Metodo per l'esecuzione di una marcatura, leggibile con l'ausilio di una macchina, in un pezzo in lavorazione. | |
BE892129A (fr) | Pneumatique, notamment pour avions, avec armature de sommet en cables textiles, et procede pour le fabriquer | |
DE3381806D1 (de) | Numerisch gesteuerte werkzeugmaschine, die zwischenmessungen ausfuehrt. | |
IT1178460B (it) | Matrice universale automatizzata, a geometria variabile | |
ATE35782T1 (de) | Vorrichtung zum bearbeiten von bandmaterial. | |
DE3165141D1 (en) | Process for doping semiconductors rapidly | |
IT7924389A0 (it) | Macchina utensile per lavorazioni molteplici. | |
YU87579A (en) | Process for preparing n,n,n,n-tetraacetyl-ethylene diamine | |
IT8122644A0 (it) | Macchina fustellatrice. | |
JPS554911A (en) | Lead frame | |
IT7926531A0 (it) | Dispositivo e procedimento di collegamento di due elementi, ed utensile per l'esecuzione del procedimento. | |
IT7924404A0 (it) | Filiera per macchine per il tagliodi filettature esterne. | |
DE3466322D1 (en) | Process for fabricating bipolar transistor | |
EP0054195A3 (en) | Process for preparing 1-amino-alkane-1,1-diphosphonic acid | |
DE3484269D1 (de) | Vorrichtung zum herstellen von kabelbaeumen. | |
BR8107821A (pt) | Processo de producao de 2,3-diidro-1,4-ditiinas | |
JPS55146951A (en) | Lead frame | |
DE3161441D1 (en) | Process for preparing 1,4-diamino-anthraquinone-2-sulphonic acid | |
ATE21373T1 (de) | Vorrichtung zum herstellen einer verbindung zwischen jeweils zwei von mehreren stationen. | |
IT7948548A0 (it) | Dispositivo di avanzamento in macchine utensili in particolar modo in presse | |
IT8119961A0 (it) | Fustellatrice piana. | |
JPS56133860A (en) | Manufacture of lead frame for semiconductor device | |
ES511026A0 (es) | "maquina insertora de varillas roscadas, actuantes como nexos de union entre piezas de madera". | |
GB2077729B (en) | Process for preparing high assay dicamba |