JPS5546615A - Signal rectifier - Google Patents

Signal rectifier

Info

Publication number
JPS5546615A
JPS5546615A JP11917778A JP11917778A JPS5546615A JP S5546615 A JPS5546615 A JP S5546615A JP 11917778 A JP11917778 A JP 11917778A JP 11917778 A JP11917778 A JP 11917778A JP S5546615 A JPS5546615 A JP S5546615A
Authority
JP
Japan
Prior art keywords
signal
terminal
output
half period
tdelta
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP11917778A
Other languages
Japanese (ja)
Inventor
Fumio Ando
Yuji Oki
Masuo Nakajima
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP11917778A priority Critical patent/JPS5546615A/en
Publication of JPS5546615A publication Critical patent/JPS5546615A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B1/00—Details of transmission systems, not covered by a single one of groups H04B3/00 - H04B13/00; Details of transmission systems not characterised by the medium used for transmission
    • H04B1/06—Receivers
    • H04B1/10—Means associated with receiver for limiting or suppressing noise or interference

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Arrangements For Transmission Of Measured Signals (AREA)
  • Emergency Protection Circuit Devices (AREA)
  • Detection And Prevention Of Errors In Transmission (AREA)

Abstract

PURPOSE:To eliminate an influence of the abnormal waveform of a FM received wave due to a single pulse noise upon a demodulated waveform, by detecting the period of a modulated wave and then by correcting the period if it does not meet fixed conditions. CONSTITUTION:An output signal from receiver 8 is supplied to waveform shaper 9, which generates rectangular signal (f9). Then, it is passed through AND circuit 14, inhibit circuit 15, OR circuits 16 and 17, and FF circuit 18 to generate signals (e18C) and (e18D), which are inputted to timers 19 and 20 respectively. As well as timer 20, timer 19 is so constituted that when a signal is applied to terminal 19A after a signal is applied to terminal 19B for time T [a half period of (f8)], an output will appear at terminal 19C T-TDELTA time later and another output will also appear at terminal 19D T+TDELTA time later. As a result, when variation in the half period of signal (f8) is above constant time TDELTA, the half period of output signal (e18C) is corrected from the half period of signal (f8) and the output of this is inputted to demodulator 10, so that if an abnormal signal would be generated due to a single-pulse noise, an error component appearing at the demodulator can be suppressed.
JP11917778A 1978-09-29 1978-09-29 Signal rectifier Pending JPS5546615A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP11917778A JPS5546615A (en) 1978-09-29 1978-09-29 Signal rectifier

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP11917778A JPS5546615A (en) 1978-09-29 1978-09-29 Signal rectifier

Publications (1)

Publication Number Publication Date
JPS5546615A true JPS5546615A (en) 1980-04-01

Family

ID=14754809

Family Applications (1)

Application Number Title Priority Date Filing Date
JP11917778A Pending JPS5546615A (en) 1978-09-29 1978-09-29 Signal rectifier

Country Status (1)

Country Link
JP (1) JPS5546615A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148252A (en) * 1983-02-14 1984-08-24 Matsushita Electric Ind Co Ltd Plate formed display device

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS59148252A (en) * 1983-02-14 1984-08-24 Matsushita Electric Ind Co Ltd Plate formed display device
JPH0421979B2 (en) * 1983-02-14 1992-04-14 Matsushita Electric Ind Co Ltd

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