JPS5537642A - Inter-processor communication system - Google Patents

Inter-processor communication system

Info

Publication number
JPS5537642A
JPS5537642A JP11031278A JP11031278A JPS5537642A JP S5537642 A JPS5537642 A JP S5537642A JP 11031278 A JP11031278 A JP 11031278A JP 11031278 A JP11031278 A JP 11031278A JP S5537642 A JPS5537642 A JP S5537642A
Authority
JP
Japan
Prior art keywords
transfer
memory
stored
instruction
processor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP11031278A
Other languages
Japanese (ja)
Other versions
JPS5833970B2 (en
Inventor
Atsuhiro Makino
Kazumi Endo
Toshio Awaji
Yoshinori Hori
Shuji Miki
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Original Assignee
Fujitsu Ltd
Nippon Telegraph and Telephone Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd, Nippon Telegraph and Telephone Corp filed Critical Fujitsu Ltd
Priority to JP53110312A priority Critical patent/JPS5833970B2/en
Publication of JPS5537642A publication Critical patent/JPS5537642A/en
Publication of JPS5833970B2 publication Critical patent/JPS5833970B2/en
Expired legal-status Critical Current

Links

Abstract

PURPOSE: To reduce delay of a transfer process by providing a memory unit stored with an ACT instruction letting a transfer controller konw a communication-destination processor and a WAIT instruction indicating a storage area for communication information to its own processor.
CONSTITUTION: Processors 1-0W1-n are linked by bus 6 thorugh transfer controllers 2-0W2-n. To make transfer controller 2-i of processor 1-i serve as a transmission side, an ACT instruction is read from individual memory 3-i and stored in memory 11 and a WAIT instruction previously set up to a transfer controller at a transfer destination is started. When unit 2-i serves as a reception side, the WAIT instruction is stored in memory 11. The contents of the header of information inputted via bus 6 are checked by address match decision part 13 and when the information is its own, data is stored in indivicdual memory 3-i according to the reception information storage area address of the WAIT instruction. Consequently data is transferred among transfer controllers directly, so that no delay of a transfer process will occur.
COPYRIGHT: (C)1980,JPO&Japio
JP53110312A 1978-09-08 1978-09-08 Inter-processor communication method Expired JPS5833970B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP53110312A JPS5833970B2 (en) 1978-09-08 1978-09-08 Inter-processor communication method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP53110312A JPS5833970B2 (en) 1978-09-08 1978-09-08 Inter-processor communication method

Publications (2)

Publication Number Publication Date
JPS5537642A true JPS5537642A (en) 1980-03-15
JPS5833970B2 JPS5833970B2 (en) 1983-07-23

Family

ID=14532512

Family Applications (1)

Application Number Title Priority Date Filing Date
JP53110312A Expired JPS5833970B2 (en) 1978-09-08 1978-09-08 Inter-processor communication method

Country Status (1)

Country Link
JP (1) JPS5833970B2 (en)

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0255339U (en) * 1988-10-12 1990-04-20
WO1992006435A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control system in a data communication system
WO1992006430A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control system in a data communication system
WO1992006431A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control method for data communication system
JP2512847B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system
JP2512848B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system
JP2512849B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040732A (en) * 1973-03-01 1975-04-14

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5040732A (en) * 1973-03-01 1975-04-14

Cited By (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0255339U (en) * 1988-10-12 1990-04-20
WO1992006435A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control system in a data communication system
WO1992006430A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control system in a data communication system
WO1992006431A1 (en) * 1990-09-28 1992-04-16 Fujitsu Limited Message control method for data communication system
US5410650A (en) * 1990-09-28 1995-04-25 Fujitsu Limited Message control system for data communication system
JP2512847B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system
JP2512848B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system
JP2512849B2 (en) * 1990-09-28 1996-07-03 富士通株式会社 Message control method for data communication system
US5592624A (en) * 1990-09-28 1997-01-07 Fujitsu Limited Data communication for controlling message transmission and reception among processing modules using information stored in descriptor to form a loosely coupled multiprocessing system
US5727151A (en) * 1990-09-28 1998-03-10 Fujitsu Limited Message control system specifying message storage buffer for data communication system with general purpose and arbitrary form buffers

Also Published As

Publication number Publication date
JPS5833970B2 (en) 1983-07-23

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