JPS5527661A - Method of manufacturing semiconductor device - Google Patents

Method of manufacturing semiconductor device

Info

Publication number
JPS5527661A
JPS5527661A JP10108578A JP10108578A JPS5527661A JP S5527661 A JPS5527661 A JP S5527661A JP 10108578 A JP10108578 A JP 10108578A JP 10108578 A JP10108578 A JP 10108578A JP S5527661 A JPS5527661 A JP S5527661A
Authority
JP
Japan
Prior art keywords
spacer
semiconductor substrate
insulator film
film
etched
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP10108578A
Other languages
Japanese (ja)
Other versions
JPS628941B2 (en
Inventor
Kazuhiko Tsuji
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP10108578A priority Critical patent/JPS5527661A/en
Publication of JPS5527661A publication Critical patent/JPS5527661A/en
Publication of JPS628941B2 publication Critical patent/JPS628941B2/ja
Granted legal-status Critical Current

Links

Landscapes

  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
  • Electrodes Of Semiconductors (AREA)

Abstract

PURPOSE: To prevent poor contact with a semiconductor substrate by covering the semiconductor substrate with the first spacer of an insulator film to protect the surface of the semiconductor substrate from being stained by sensitive resin films and developers.
CONSTITUTION: Impurity diffusion regions 13 are formed on a semiconductor substrate 11 on which an insulator film 12 with openings is formed, and on the substrate, the first spacer 14 of an insulator film whose etched speed is faster than that of the insulator film 12 is formed all over the surface. Further on the spacer, the second spacer 15 of an insulator film is formed by an ordinary photoetching method, and then the light sensitive resin film is removed. Next, the first spacer 14 is etched using the second spacer 15 as a mask, a conductive film 17 is formed all over, and an etching mask 18 is formed in a pattern inverse to the second spacer 15. Next, the exposed part of the conductive film 17 is etched, and removing the etching mask 18, a conductive film pattern 19 is formed.
COPYRIGHT: (C)1980,JPO&Japio
JP10108578A 1978-08-18 1978-08-18 Method of manufacturing semiconductor device Granted JPS5527661A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP10108578A JPS5527661A (en) 1978-08-18 1978-08-18 Method of manufacturing semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP10108578A JPS5527661A (en) 1978-08-18 1978-08-18 Method of manufacturing semiconductor device

Publications (2)

Publication Number Publication Date
JPS5527661A true JPS5527661A (en) 1980-02-27
JPS628941B2 JPS628941B2 (en) 1987-02-25

Family

ID=14291251

Family Applications (1)

Application Number Title Priority Date Filing Date
JP10108578A Granted JPS5527661A (en) 1978-08-18 1978-08-18 Method of manufacturing semiconductor device

Country Status (1)

Country Link
JP (1) JPS5527661A (en)

Also Published As

Publication number Publication date
JPS628941B2 (en) 1987-02-25

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