JPS5522864A - Mask for lithography and its manufacturing method - Google Patents

Mask for lithography and its manufacturing method

Info

Publication number
JPS5522864A
JPS5522864A JP9645278A JP9645278A JPS5522864A JP S5522864 A JPS5522864 A JP S5522864A JP 9645278 A JP9645278 A JP 9645278A JP 9645278 A JP9645278 A JP 9645278A JP S5522864 A JPS5522864 A JP S5522864A
Authority
JP
Japan
Prior art keywords
defect
mask
exposing
film
resist
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP9645278A
Inventor
Toshio Wada
Original Assignee
Nec Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nec Corp filed Critical Nec Corp
Priority to JP9645278A priority Critical patent/JPS5522864A/en
Publication of JPS5522864A publication Critical patent/JPS5522864A/en
Application status is Pending legal-status Critical

Links

Abstract

PURPOSE: To improve a blocking operation of a mask and reduce a defect by irradiating an ion against a photoresist layer laminated on a metallic layer.
CONSTITUTION: When a Cr film 2 having a thickness of 3000Å approximately is sputtered to a glass plate 1, a pin-hole exists. If photoresist patterns 3, 3' and 3" are formed by a photograph exposing development process on the film 2, a defect D as thick as 0.25 to 0.5μmϕ in that layer exists as well. The defect D is removed by heating upto 150°C and shakening the resist. The Cr film 2 is etched by utilizing the masks 3, 3' and 3". Thereafter, the resist films 3, 3' and 3" are firmly sticked by injecting an Ar ion of 1015 to 1013 cm-2 at 150KeV. According to such a process, an exposing shield effect of a predetermined pattern portion can be raised and the occurrence of an abnormal pattern due to the defect can also be prevented.
COPYRIGHT: (C)1980,JPO&Japio
JP9645278A 1978-08-07 1978-08-07 Mask for lithography and its manufacturing method Pending JPS5522864A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP9645278A JPS5522864A (en) 1978-08-07 1978-08-07 Mask for lithography and its manufacturing method

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP9645278A JPS5522864A (en) 1978-08-07 1978-08-07 Mask for lithography and its manufacturing method

Publications (1)

Publication Number Publication Date
JPS5522864A true JPS5522864A (en) 1980-02-18

Family

ID=14165401

Family Applications (1)

Application Number Title Priority Date Filing Date
JP9645278A Pending JPS5522864A (en) 1978-08-07 1978-08-07 Mask for lithography and its manufacturing method

Country Status (1)

Country Link
JP (1) JPS5522864A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730143A (en) * 1981-01-09 1982-02-18 Sharp Corp Record player
US6656644B2 (en) 2000-07-07 2003-12-02 Hitachi Ltd. Manufacturing method of photomask and photomask
US6794207B2 (en) 2000-07-07 2004-09-21 Renesas Technology Corp. Method of manufacturing integrated circuit

Cited By (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5730143A (en) * 1981-01-09 1982-02-18 Sharp Corp Record player
US6656644B2 (en) 2000-07-07 2003-12-02 Hitachi Ltd. Manufacturing method of photomask and photomask
US6794207B2 (en) 2000-07-07 2004-09-21 Renesas Technology Corp. Method of manufacturing integrated circuit
US6846598B2 (en) 2000-07-07 2005-01-25 Hitachi, Ltd. Manufacturing method of photomask and photomask
US6902868B2 (en) 2000-07-07 2005-06-07 Renesas Technology Corp. Method of manufacturing integrated circuit
US6936406B2 (en) 2000-07-07 2005-08-30 Renesas Technology Corp. Method of manufacturing integrated circuit
US6958292B2 (en) 2000-07-07 2005-10-25 Renesas Technology Corp. Method of manufacturing integrated circuit

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