JPS55163917A - Inverter circuit - Google Patents

Inverter circuit

Info

Publication number
JPS55163917A
JPS55163917A JP6985279A JP6985279A JPS55163917A JP S55163917 A JPS55163917 A JP S55163917A JP 6985279 A JP6985279 A JP 6985279A JP 6985279 A JP6985279 A JP 6985279A JP S55163917 A JPS55163917 A JP S55163917A
Authority
JP
Japan
Prior art keywords
node
signal
outputs
differential amplifier
potential
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6985279A
Other languages
Japanese (ja)
Inventor
Sumio Tanaka
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Tokyo Shibaura Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp, Tokyo Shibaura Electric Co Ltd filed Critical Toshiba Corp
Priority to JP6985279A priority Critical patent/JPS55163917A/en
Publication of JPS55163917A publication Critical patent/JPS55163917A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
    • H03K19/01—Modifications for accelerating switching
    • H03K19/017—Modifications for accelerating switching in field-effect transistor circuits

Landscapes

  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Computing Systems (AREA)
  • General Engineering & Computer Science (AREA)
  • Mathematical Physics (AREA)
  • Electronic Switches (AREA)
  • Logic Circuits (AREA)
  • Static Random-Access Memory (AREA)
  • Manipulation Of Pulses (AREA)

Abstract

PURPOSE:To increase a switching speed by making it easy to detect a signal level, by previously matching the reference potential of a differential amplifier with the logical polarity of the next signal. CONSTITUTION:When input signal 20 is held at a high level of 5V, a voltage of 4V, less by the threshold level of about 1V of transistor 18, is output to node 24 via delaying circuit 30; and after signal 20 switches from the high level of 5V to the low level of 1V, node 20 when exceeding a potential 4V at reference node 24 of a differential amplifier outputs voltages of about 4V and 1V to output contacts 21 and 22 of the differential amplifier, and node 24, receiving those outputs, generates an output of about 2V after certain time delay. Once signal 20 changes from 1V to 5V, outputs of about 1V and 4V are sent to nodes 21 and 22 when the potential at node 24 is about 2V and that at node 20 exceeds 2V and node 24, receivng those outputs, generates about 4V after certain time delay, thereby repeating the above- mentioned operation after this. Consequently, the switching spped can be increased.
JP6985279A 1979-06-06 1979-06-06 Inverter circuit Pending JPS55163917A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6985279A JPS55163917A (en) 1979-06-06 1979-06-06 Inverter circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6985279A JPS55163917A (en) 1979-06-06 1979-06-06 Inverter circuit

Publications (1)

Publication Number Publication Date
JPS55163917A true JPS55163917A (en) 1980-12-20

Family

ID=13414747

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6985279A Pending JPS55163917A (en) 1979-06-06 1979-06-06 Inverter circuit

Country Status (1)

Country Link
JP (1) JPS55163917A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445051A (en) * 1981-06-26 1984-04-24 Burroughs Corporation Field effect current mode logic gate
JPS625724A (en) * 1985-07-01 1987-01-12 Toshiba Corp Inverter circuit
JPS6257313A (en) * 1985-09-05 1987-03-13 Toshiba Corp Input circuit
JPS6412717A (en) * 1987-06-29 1989-01-17 Ibm Signal processing circuit with hysteresis

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4445051A (en) * 1981-06-26 1984-04-24 Burroughs Corporation Field effect current mode logic gate
JPS625724A (en) * 1985-07-01 1987-01-12 Toshiba Corp Inverter circuit
JPS6257313A (en) * 1985-09-05 1987-03-13 Toshiba Corp Input circuit
JPH0523646B2 (en) * 1985-09-05 1993-04-05 Toshiba Kk
JPS6412717A (en) * 1987-06-29 1989-01-17 Ibm Signal processing circuit with hysteresis

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