JPS55154747A - Manufacture of semiconductor integrated circuit device - Google Patents

Manufacture of semiconductor integrated circuit device

Info

Publication number
JPS55154747A
JPS55154747A JP6303379A JP6303379A JPS55154747A JP S55154747 A JPS55154747 A JP S55154747A JP 6303379 A JP6303379 A JP 6303379A JP 6303379 A JP6303379 A JP 6303379A JP S55154747 A JPS55154747 A JP S55154747A
Authority
JP
Japan
Prior art keywords
recesses
layers
epitaxial layers
substrate
film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP6303379A
Other languages
Japanese (ja)
Other versions
JPS5849014B2 (en
Inventor
Junichi Nishizawa
Masafumi Shinpo
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Instruments Inc
Semiconductor Research Foundation
Original Assignee
Seiko Instruments Inc
Semiconductor Research Foundation
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Instruments Inc, Semiconductor Research Foundation filed Critical Seiko Instruments Inc
Priority to JP54063033A priority Critical patent/JPS5849014B2/en
Publication of JPS55154747A publication Critical patent/JPS55154747A/en
Publication of JPS5849014B2 publication Critical patent/JPS5849014B2/en
Expired legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers

Abstract

PURPOSE:To obtain a semiconductor integrated circuit device (IC) having high integration degree by forming a plurality of recesses on the main surface epitaxial growing thereof is larger in lateral direction than in longitudinal direction, of a substrate, coating an insulating film on the entire surface, partially selectively removing the insulating film and filling epitaxial layers of different depths in the recesses. CONSTITUTION:The surface (100) of a p-type Si substrate 1 is, for example, anisotropically etched to form two recesses including side walls on the surface (111) with an SiO2 film 6 as a mask, and n<+>-type diffused layers 2, 12 are formed in the respective recesses. The SiO2 film 6 is again coated thereon, selectively removed, and retained in the vicinity of the upper surface of the raised portion of the side walls. When epitaxial layers 3, 13 are grown in the recesses, stopped growing at the ends of the films 6 to form epitaxial layers of different depths by one process. Polysilicon on the film 6 is removed, and predetermined diffused layer, buried leading layers 102, 112 or the like are formed by the oridinary process. Then, respective elements are isolated via the p-type substrate 1. In this configuration, a number of different epitaxial layers can be isolated, buried layers can be led out easily to increase the integration degree thereof.
JP54063033A 1979-05-22 1979-05-22 Method for manufacturing semiconductor integrated circuit device Expired JPS5849014B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP54063033A JPS5849014B2 (en) 1979-05-22 1979-05-22 Method for manufacturing semiconductor integrated circuit device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP54063033A JPS5849014B2 (en) 1979-05-22 1979-05-22 Method for manufacturing semiconductor integrated circuit device

Publications (2)

Publication Number Publication Date
JPS55154747A true JPS55154747A (en) 1980-12-02
JPS5849014B2 JPS5849014B2 (en) 1983-11-01

Family

ID=13217602

Family Applications (1)

Application Number Title Priority Date Filing Date
JP54063033A Expired JPS5849014B2 (en) 1979-05-22 1979-05-22 Method for manufacturing semiconductor integrated circuit device

Country Status (1)

Country Link
JP (1) JPS5849014B2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5422299A (en) * 1989-09-11 1995-06-06 Purdue Research Foundation Method of forming single crystalline electrical isolated wells

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917966A (en) * 1972-06-07 1974-02-16
JPS5084181A (en) * 1973-11-27 1975-07-07

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS4917966A (en) * 1972-06-07 1974-02-16
JPS5084181A (en) * 1973-11-27 1975-07-07

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US5422299A (en) * 1989-09-11 1995-06-06 Purdue Research Foundation Method of forming single crystalline electrical isolated wells

Also Published As

Publication number Publication date
JPS5849014B2 (en) 1983-11-01

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