JPS55151345A - Soldering method of chip - Google Patents

Soldering method of chip

Info

Publication number
JPS55151345A
JPS55151345A JP5911979A JP5911979A JPS55151345A JP S55151345 A JPS55151345 A JP S55151345A JP 5911979 A JP5911979 A JP 5911979A JP 5911979 A JP5911979 A JP 5911979A JP S55151345 A JPS55151345 A JP S55151345A
Authority
JP
Japan
Prior art keywords
substrate
electrode
chip
solder
printed
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP5911979A
Other languages
English (en)
Japanese (ja)
Other versions
JPS628936B2 (https=
Inventor
Yutaka Akiba
Katsuo Abe
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP5911979A priority Critical patent/JPS55151345A/ja
Publication of JPS55151345A publication Critical patent/JPS55151345A/ja
Publication of JPS628936B2 publication Critical patent/JPS628936B2/ja
Granted legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/01—Manufacture or treatment
    • H10W70/05—Manufacture or treatment of insulating or insulated package substrates, or of interposers, or of redistribution layers
    • H10W70/093—Connecting or disconnecting other interconnections thereto or therefrom, e.g. connecting bond wires or bumps
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/099—Connecting interconnections to insulating or insulated package substrates, interposers or redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W70/00—Package substrates; Interposers; Redistribution layers [RDL]
    • H10W70/60—Insulating or insulated package substrates; Interposers; Redistribution layers
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W72/00—Interconnections or connectors in packages
    • H10W72/071—Connecting or disconnecting
    • H10W72/073—Connecting or disconnecting of die-attach connectors
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W90/00—Package configurations

Landscapes

  • Electric Connection Of Electric Components To Printed Circuits (AREA)
  • Wire Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)
JP5911979A 1979-05-16 1979-05-16 Soldering method of chip Granted JPS55151345A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5911979A JPS55151345A (en) 1979-05-16 1979-05-16 Soldering method of chip

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5911979A JPS55151345A (en) 1979-05-16 1979-05-16 Soldering method of chip

Publications (2)

Publication Number Publication Date
JPS55151345A true JPS55151345A (en) 1980-11-25
JPS628936B2 JPS628936B2 (https=) 1987-02-25

Family

ID=13104097

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5911979A Granted JPS55151345A (en) 1979-05-16 1979-05-16 Soldering method of chip

Country Status (1)

Country Link
JP (1) JPS55151345A (https=)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5276379U (https=) * 1975-12-05 1977-06-07
JPS5324254U (https=) * 1976-08-09 1978-03-01

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5276379U (https=) * 1975-12-05 1977-06-07
JPS5324254U (https=) * 1976-08-09 1978-03-01

Also Published As

Publication number Publication date
JPS628936B2 (https=) 1987-02-25

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