JPS55147858A - External device controlling circuit - Google Patents

External device controlling circuit

Info

Publication number
JPS55147858A
JPS55147858A JP5543879A JP5543879A JPS55147858A JP S55147858 A JPS55147858 A JP S55147858A JP 5543879 A JP5543879 A JP 5543879A JP 5543879 A JP5543879 A JP 5543879A JP S55147858 A JPS55147858 A JP S55147858A
Authority
JP
Japan
Prior art keywords
external device
gate
controlling circuit
device controlling
transmit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP5543879A
Other languages
Japanese (ja)
Inventor
Toshiyuki Kikuchi
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Mitsubishi Electric Corp
Original Assignee
Mitsubishi Electric Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Mitsubishi Electric Corp filed Critical Mitsubishi Electric Corp
Priority to JP5543879A priority Critical patent/JPS55147858A/en
Publication of JPS55147858A publication Critical patent/JPS55147858A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
    • H04L5/00—Arrangements affording multiple use of the transmission path
    • H04L5/14—Two-way operation using the same type of signal, i.e. duplex

Landscapes

  • Engineering & Computer Science (AREA)
  • Signal Processing (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Communication Control (AREA)

Abstract

PURPOSE:To make it possible to transmit and receive data to and from the external device which does not generate a status signal, by providing a change-over switch, a pull-up resistance, and an OR gate to generate the signal internally. CONSTITUTION:In case that the interface circuit is connected to external device 1b which cannot transmit the status signal, change-over switch S is switched to the OPEN side. Then, one input of OR gate 2d becomes high-level, and the output of the OR gate is always high-level, and therefore, the state of external device 1b is regarded as READY, so that data transmission and receiving controller 8 can receive receiving data 4a transmitted next from external device 1b.
JP5543879A 1979-05-07 1979-05-07 External device controlling circuit Pending JPS55147858A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP5543879A JPS55147858A (en) 1979-05-07 1979-05-07 External device controlling circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP5543879A JPS55147858A (en) 1979-05-07 1979-05-07 External device controlling circuit

Publications (1)

Publication Number Publication Date
JPS55147858A true JPS55147858A (en) 1980-11-18

Family

ID=12998590

Family Applications (1)

Application Number Title Priority Date Filing Date
JP5543879A Pending JPS55147858A (en) 1979-05-07 1979-05-07 External device controlling circuit

Country Status (1)

Country Link
JP (1) JPS55147858A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977746A (en) * 1982-10-26 1984-05-04 Nippon Telegr & Teleph Corp <Ntt> Data transmission control system

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5977746A (en) * 1982-10-26 1984-05-04 Nippon Telegr & Teleph Corp <Ntt> Data transmission control system

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