JPS5497301A - Signal transmission system - Google Patents
Signal transmission systemInfo
- Publication number
- JPS5497301A JPS5497301A JP459578A JP459578A JPS5497301A JP S5497301 A JPS5497301 A JP S5497301A JP 459578 A JP459578 A JP 459578A JP 459578 A JP459578 A JP 459578A JP S5497301 A JPS5497301 A JP S5497301A
- Authority
- JP
- Japan
- Prior art keywords
- signal
- circuit
- outputted
- clock
- terminal
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04L—TRANSMISSION OF DIGITAL INFORMATION, e.g. TELEGRAPHIC COMMUNICATION
- H04L5/00—Arrangements affording multiple use of the transmission path
- H04L5/14—Two-way operation using the same type of signal, i.e. duplex
Landscapes
- Engineering & Computer Science (AREA)
- Signal Processing (AREA)
- Computer Networks & Wireless Communication (AREA)
- Information Transfer Systems (AREA)
- Bidirectional Digital Transmission (AREA)
- Synchronisation In Digital Transmission Systems (AREA)
Abstract
PURPOSE:To reduce the number of terminals of a LSI, to miniaturize an electronic device, and to transmit signals at a high speed by transmitting self-clock signals composed of an information signal and clock signal from both the terminals of a transmission line at the same time in both directions. CONSTITUTION:When no signal is sent out from transmission circuit 17, information signal A from input terminal 1 and clock signal B from input terminal 2 are inputted and self-clock signal C is outputted from synthesizer circuit 3. This signal is added by adder circuit 4 to a signal level on the transmission line befor being transmitted to transmission circuit 17 and inputted to reception circuit 10. In this case, since no signal is transmitted from transmission circuit 17, the result obtained by subtracter circuit 7 becomes zero and, in consequence, no signals are outputted from both information output terminal 11 and clock terminal 12. When signal E is outputted from transmission circuit 17, waveform E is obtained by subtracter circuit 7 and the information signal and clock signal are separated each other by separation circuit 8 and outputted from terminal 11 and 12 respectively.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP459578A JPS5497301A (en) | 1978-01-19 | 1978-01-19 | Signal transmission system |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP459578A JPS5497301A (en) | 1978-01-19 | 1978-01-19 | Signal transmission system |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS5497301A true JPS5497301A (en) | 1979-08-01 |
Family
ID=11588386
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP459578A Pending JPS5497301A (en) | 1978-01-19 | 1978-01-19 | Signal transmission system |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS5497301A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997049040A1 (en) * | 1996-06-20 | 1997-12-24 | Sega Enterprises, Ltd. | Game device, peripheral device and relay device |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5071213A (en) * | 1973-10-24 | 1975-06-13 | ||
JPS5164811A (en) * | 1974-10-15 | 1976-06-04 | Motorola Inc |
-
1978
- 1978-01-19 JP JP459578A patent/JPS5497301A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5071213A (en) * | 1973-10-24 | 1975-06-13 | ||
JPS5164811A (en) * | 1974-10-15 | 1976-06-04 | Motorola Inc |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
WO1997049040A1 (en) * | 1996-06-20 | 1997-12-24 | Sega Enterprises, Ltd. | Game device, peripheral device and relay device |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |