JPS544568A - Semiconductor device and production of the same - Google Patents

Semiconductor device and production of the same

Info

Publication number
JPS544568A
JPS544568A JP6960877A JP6960877A JPS544568A JP S544568 A JPS544568 A JP S544568A JP 6960877 A JP6960877 A JP 6960877A JP 6960877 A JP6960877 A JP 6960877A JP S544568 A JPS544568 A JP S544568A
Authority
JP
Japan
Prior art keywords
production
same
semiconductor device
bonding
perform stable
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6960877A
Other languages
Japanese (ja)
Inventor
Kazuharu Saito
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Seiko Epson Corp
Suwa Seikosha KK
Original Assignee
Seiko Epson Corp
Suwa Seikosha KK
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Seiko Epson Corp, Suwa Seikosha KK filed Critical Seiko Epson Corp
Priority to JP6960877A priority Critical patent/JPS544568A/en
Publication of JPS544568A publication Critical patent/JPS544568A/en
Pending legal-status Critical Current

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto

Landscapes

  • Wire Bonding (AREA)

Abstract

PURPOSE: To perform stable bonding by contact heating without using any bonding tool.
COPYRIGHT: (C)1979,JPO&Japio
JP6960877A 1977-06-13 1977-06-13 Semiconductor device and production of the same Pending JPS544568A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6960877A JPS544568A (en) 1977-06-13 1977-06-13 Semiconductor device and production of the same

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6960877A JPS544568A (en) 1977-06-13 1977-06-13 Semiconductor device and production of the same

Publications (1)

Publication Number Publication Date
JPS544568A true JPS544568A (en) 1979-01-13

Family

ID=13407727

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6960877A Pending JPS544568A (en) 1977-06-13 1977-06-13 Semiconductor device and production of the same

Country Status (1)

Country Link
JP (1) JPS544568A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5574147A (en) * 1978-11-29 1980-06-04 Nippon Telegr & Teleph Corp <Ntt> Terminal connection
JPS60154536A (en) * 1984-01-24 1985-08-14 Toshiba Corp Wiring process of integrated circuit element

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5574147A (en) * 1978-11-29 1980-06-04 Nippon Telegr & Teleph Corp <Ntt> Terminal connection
JPS60154536A (en) * 1984-01-24 1985-08-14 Toshiba Corp Wiring process of integrated circuit element

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